H03G1/00

Variable-phase amplifier circuits and devices

Variable-phase amplifier circuits and devices. In some embodiments, an amplifier can include a variable-gain stage having a plurality of switchable amplification branches, with each being capable of being activated, such that a combination of one or more activated amplification branches provides respective gain level and phase shift. The plurality of switchable amplification branches can be configured such that the phase shift provided by each combination of one or more activated amplification branches compensates for a phase shift associated with the amplifier operating with the respective gain level of the variable-gain stage.

Variable Gain Amplifier And Phased Array Transceiver
20220021363 · 2022-01-20 ·

This application provides a variable gain amplifier and a phased array transceiver, to enable the variable gain amplifier to keep a phase constant when switching a gain, and to enable a gain step to be stable with a frequency. The variable gain amplifier includes an amplification circuit, configured to amplify an input signal; a control circuit, configured to control a gain of the amplification circuit by adjusting an output current of the amplification circuit; and an inductive load and an inductive adjustment circuit, where the inductive load is coupled to a signal output end of the amplification circuit, the inductive adjustment circuit and the inductive load are inductively coupled, and the inductive adjustment circuit is adjustable.

Gain-control stage for a variable gain amplifier

The invention relates to a gain-control stage (100) for generating gain-control signals (V.sub.c+, V.sub.c−) for controlling an external variable-gain amplifying unit (101). The gain-control stage comprises a first (102) and a second differential amplifier unit (112) that receive, at a respective input interface (104,114) a reference voltage signal (V.sub.Ref) and a variable gain-control voltage signal (V.sub.GC). The second differential amplifier unit is configured to provide, via a second output interface (120), a control voltage signal (V.sub.1) to a controllable first current source (106) of the first differential amplifier unit (102). The first differential amplifier unit (102) is configured to provide, via a first output interface (110), the first and the second gain-control signal (V.sub.C+, V.sub.C−) in dependence on the variable gain-control voltage signal (V.sub.GC), the reference voltage signal (V.sub.Ref) and a first biasing current (I.sub.B1) that depends on the control voltage signal.

Amplifier having switch and switch control processor controlling switch

The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). An amplifier is provided. The amplifier includes a first resistor electrically connected to the input terminal, a second resistor electrically connected to the output terminal, a switch including a metal-oxide-semiconductor field-effect transistor (MOSFET) and electrically connected to one end of the second resistor, and a switch control processor configured to electrically connect the gate terminal of the MOSFET constituting the switch and the bulk terminal of the MOSFET constituting the switch to an impedance having an impedance value higher than a preset first threshold.

Method and Apparatus to Optimize Power Clamping
20220014221 · 2022-01-13 ·

A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.

Inverter stacking amplifier

The exemplified disclosure presents a highly power efficient amplifier (e.g., front-end inverter and/or amplifier) that achieves significant current reuse (e.g., 6-time for a 3-stack embodiments) by stacking inverters and splitting the capacitor feedback network. In some embodiments, the exemplified technology facilitates N-time current reuse to substantially reduced power consumption. It is observed that the exemplified disclosure facilitates significant current-reuse operation that significantly boost gain gm while providing low noise performance without increasing power usage. In addition, the exemplified technology is implemented such that current reuse and number of transistor has a generally linear relationship and using fewer transistors as compared to known circuits of similar topology.

CIRCUITRY FOR PROVIDING AN OUTPUT VOLTAGE

The present disclosure relates to circuitry for providing an output voltage. The circuitry comprises: voltage generator circuitry configured to provide an output voltage to an output node of the circuitry; current limiter circuitry operable to perform current limiting so as to limit a current supplied at the output node of the circuitry; detection circuitry configured to output a detection signal when a load voltage across a load coupled to the output node of the circuitry reaches a target voltage; and delay circuitry configured to receive the detection signal and to output a control signal to deactivate current limiting by the current limiter circuitry after a predetermined delay period after receiving the detection signal.

CMOS triple-band RF VGA and power amplifier in linear transmitter
11190150 · 2021-11-30 · ·

Methods and systems for amplifying signals are provided. Embodiments include a three-to-one multiplexer, a multiband RF variable gain amplifier (VGA), a multiband power amplifier driver (PAD), and a one-to three multiplexer. The three-to-one multiplexer receives three input signals from an RF frequency source and outputs an output signal corresponding one input signal. The multiband RF VGA receives the output signal of the three-to-one multiplexer, provides a first level of amplification to the signal received from the three-to-one multiplexer, and outputs an amplified version of the signal. The multiband PAD receives the signal output by the multiband RF variable gain amplifier and provides a second level of amplification to the signal and outputs an amplified version of the signal. The one-to-three multiplexer receives a signal output by the multiband PAD produces three output signals that correspond to each of the three input signals.

HIGH-FREQUENCY POWER AMPLIFIER

A high-frequency power amplifier is configured in such a way as to include an input matching circuit, an amplifying element, an output matching circuit, a coupling circuit, a detection circuit, and an output terminal, and in such a way that either the input matching circuit or the output matching circuit has an active element, the detection circuit receives a signal outputted by the coupling circuit and outputs a control voltage into which the detection circuit converts the signal to the active element, and the active element changes the impedance of the active element in accordance with the control voltage outputted by the detection circuit, thereby changing the power of a signal outputted by either the input matching circuit having the active element or the output matching circuit having the active element, to change the power of a signal which the coupling circuit outputs to the output terminal.

Field Effect Transistor Circuits
20210344316 · 2021-11-04 ·

A number of field effect transistor circuits include voltage controlled attenuators or voltage controlled processing circuits. Example circuits include modulators, lower distortion variable voltage controlled resistors, sine wave to triangle wave converters, and or servo controlled biasing circuits.