Patent classifications
H03H17/00
Adaptive analog parallel combiner
An adaptive analog parallel combiner circuit for receiver data recovery from a communication signal is provided. The circuit includes a summer that sums outputs of a plurality of filter taps in parallel, including zeroth and first through Nth filter taps, each filter tap having as input the communication signal or a version thereof, wherein N is a finite integer greater than or equal to two. The zeroth filter tap has an amplifier with gain controlled by a zeroth adaptive gain control coefficient, and each of the first through Nth filter taps having an all pass filter and gain controlled amplification, with gain controlled by a corresponding one of a first through Nth adaptive gain control coefficients and the all pass filter implementing a transfer function having a zero and a pole equaling each other and at a base frequency divided by a corresponding integer from one through N.
Filter for a Brushless DC Motor
A filter for use with a brushless DC motor to filter a signal received from a floating terminal of the brushless DC motor, wherein the filter is configured such that a time delay introduced by the filter to the signal received from the floating terminal is equal to the time taken for a rotor of the motor to rotate through an angle equal to half of a commutation step of the motor.
ACOUSTIC SIGNAL PROCESSING APPARATUS, METHOD AND PROGRAM FOR THE SAME
Provided is an acoustic signal processing technique for performing a signal transformation suitable for desired signal processing (e.g., sound source enhancement processing) on a signal, and then performing the desired signal processing on the transformed signal. An acoustic signal processing device performs signal processing M which is a desired target on an input acoustic signal x. The acoustic signal processing device includes a transform unit that performs transform processing P on the acoustic signal x to obtain a first transform coefficient X; a signal processing unit that performs signal processing M corresponding to a desired target on the first transform coefficient X to obtain a second transform coefficient {circumflex over ( )}S; and an inverse transform unit that performs inverse transform processing P.sup.−1 on the second transform coefficient {circumflex over ( )}S to obtain an acoustic signal {circumflex over ( )}s subjected to signal processing which is a desired target, wherein the transform processing P, the inverse transform processing P.sup.−1, and the signal processing M are simultaneously optimized.
Demultiplexing circuit, multiplexing circuit, and channelizer relay unit
A multi-stage demultiplexing circuit in which a plurality of circuits each combining a selector and a frequency decimation circuit are connected is included. The selector selects one of input signals based on a control signal, and generates a plurality of output signals. The plurality of output signals output from the selector are input to the frequency decimation circuit, and the frequency decimation circuit performs frequency conversion processing, low pass filter processing, and down-sampling processing based on a control signal to generate an output signal. Two or more reception signals are input to the multi-stage demultiplexing circuit, and the multi-stage demultiplexing circuit executes demultiplexing processing based on a control signal so that an output signal that includes an unused band portion is prevented from being output downstream.
Method for carrying out a morphing process
Method for carrying out a morphing process, wherein an output parameter relating to the output of an audio signal outputted into an interior via an audio output device is changed.
DEMULTIPLEXING CIRCUIT, MULTIPLEXING CIRCUIT, AND CHANNELIZER RELAY UNIT
A multi-stage demultiplexing circuit in which a plurality of circuits each combining a selector and a frequency decimation circuit are connected is included. The selector selects one of input signals based on a control signal, and generates a plurality of output signals. The plurality of output signals output from the selector are input to the frequency decimation circuit, and the frequency decimation circuit performs frequency conversion processing, low pass filter processing, and down-sampling processing based on a control signal to generate an output signal. Two or more reception signals are input to the multi-stage demultiplexing circuit, and the multi-stage demultiplexing circuit executes demultiplexing processing based on a control signal so that an output signal that includes an unused band portion is prevented from being output downstream.
Resampling algorithm based on window function
A resampling method based on window function for flexible sampling rate conversion in broadband frequency measurement devices is described. The resampling algorithm can satisfy the requirements of different sampling rates. The frequency responses of the filter in the resampling model based on the Farrow structure are analyzed, and the design criterion of the filter in resampling model is considered. A fractional delay filter design model based on window function method is described. A fractional delay filter matrix, which is expressed by polynomial form, is constructed. Then the expression related to subfilter coefficients is obtained and subfilter coefficients are solved for by the least square method.
Estimation of the amplitude of a periodic component in a measured signal through a delta-sigma modulator
A method and device estimate an amplitude of a periodic component in a measured analog signal, e.g. from an electric motor, and adapt a control law for an external entity, e.g., a variable speed drive (VSD) controlling the motor, based on the estimated amplitude. The measured analog signal is converted by delta-sigma modulation to a digital signal that is applied to at least one filter. Periodic signals of independent known periodic functions are also applied to the at least one filter. In response, the at least one filter provides the estimated amplitude of the periodic component in the measured analog signal that may be used to adapt the control law. A monitoring value for the electric motor may also be based on the estimated amplitude of the periodic component.
Decision feedback equalizer
An amplifier output from an amplifier to an SR latch is used as a feedback signal through a buffer. An adder having a combination of an addition unit and an xh block is provided within the amplifier and transmits a feedback signal (analog signal) generated from the feedback signal FBD (digital signal) by the xh block to the addition unit and adds it to an output from a latch block. In the amplifier, the operation for adding the output from the latch block and the feedback signal occurs during a latch operation in the latch block.
Identifying mechanical impedance of an electromagnetic load using least-mean-squares filter
A method for identifying a mechanical impedance of an electromagnetic load may include generating a waveform signal for driving an electromagnetic load and, during driving of the electromagnetic load by the waveform signal or a signal derived therefrom, receiving a current signal representative of a current associated with the electromagnetic load and a back electromotive force signal representative of a back electromotive force associated with the electromagnetic load. The method may also include implementing an adaptive filter to identify parameters of the mechanical impedance of the electromagnetic load, wherein an input of a coefficient control for adapting coefficients of the adaptive filter is a first signal derived from the back electromotive force signal and a target of the coefficient control for adapting coefficients of the adaptive filter is a second signal derived from the current signal.