H03H17/00

Noise generator

A noise generator for generating a noise signal over a frequency spectrum has a first noise source and a first digital filter for a first frequency band, a second noise source and a second digital filter for a second frequency band, and an interpolator and a combiner. The first digital filter has a first sample rate and the second digital filter has a second sample rate, wherein the ratio between the second sample rate and the first sample rate, with regard to a sign, corresponds to a ratio between center frequencies of the second frequency band and the first frequency band, wherein an edge of the second digital filters which determines a lower frequency band limit is steeper than an edge of the first digital filter which determines an upper frequency band limit. The interpolator is configured to adjust an output signal of the first digital filter, with regard to its sample rate, to a sample rate of the second digital filter, wherein the combiner is configured to combine the adjusted output signal from the interpolator and the output signal of the second digital filter.

System and method for cheque image data masking using data file and template cheque image

System and method for cheque image data masking are disclosed. In an example, a cheque image and a data file are received, the data file includes data records with values corresponding to sensitive data fields in the cheque image. Further, a template cheque image matching to the cheque image and redacted information associated with the template cheque image are obtained. Furthermore, a blank image snippet is generated for each sensitive data field in the cheque image based on a part of the obtained information about sensitive fields. Moreover, values corresponding to each sensitive field from the input data file are written to the blank image snippet based on the remaining information about sensitive fields. Also, the template cheque image is updated with the image snippet. Data of non-sensitive fields in the cheque image is then copied to the template cheque image, thereby facilitating cheque image data masking.

Impedance adjusting circuit and integrated circuit including the same

An impedance adjusting circuit includes: a first node coupled to a resistor; a first impedance unit having an impedance value determined based on a first impedance code and coupled between a first voltage terminal and a second node; a first switching unit suitable for electrically connecting the first node and the second node to each other in response to a clock; a first average voltage unit suitable for generating an average voltage of the first node; a first comparison unit suitable for comparing the average voltage of the first node with a first reference voltage to produce a comparison result of the first comparison unit; and a first code generation unit suitable for generating the first impedance code in response to the comparison result of the first comparison unit.

High gamma on-wafer load pull test system
10693437 · 2020-06-23 ·

A millimeter-wave, high GAMMA on-wafer load pull system uses a tuner with extended inclined slabline (bend-line) and a manually controlled low profile pre-matching module, mounted on the bent section of the slabline next to the wafer-probe. The pre-matching module uses a mobile sliding rack and a rotating tuning probe; the rack is mounted on the slabline extension and controlled by a fixed pinion. Both the rack and tuning probe position and immersion into the slabline are controlled using sidewise mounted easily accessible manual knobs. The low profile of the pre-matching module is a crucial feature and allows integration on the extended slabline of the tuner in immediate proximity of the wafer-probe, thus minimizing any additional insertion loss and maximizing tuning range. Manual handling of the pre-matching tuning module is easy and a pre-calibration allows efficient on-wafer load pull operations.

EQUALIZER, RECEIVING APPARATUS AND RECEIVING METHOD
20200162291 · 2020-05-21 · ·

An equalizer can connect with N receiving antennas that receive single carrier transmission signals transmitted from M transmitting antenna(s) in the same frequency band at the same time, and receives as input L signals sampled in a sampling period T from each of the N receiving antennas, the equalizer comprising, a first selection part that selects K signal(s) from the L signals for each of the N receiving antennas as signals to be multiplied by a first tap coefficient(s), and a second selection part selects L-K signal(s) to be multiplied by a second tap coefficient(s), from the L signals obtained by multiplying signals in the same sampling period for each of the N receiving antennas by the tap coefficient(s) and performing addition thereof.

Attenuators for electronic applications
10622970 · 2020-04-14 · ·

In some embodiments, an attenuator for electronic application can include a first group of attenuation steps, with each configured to switchably provide a first fixed attenuation value. The attenuator can further include a second group of attenuation steps, with each configured to switchably provide a second fixed attenuation value. Magnitude of the second fixed attenuation value can be less than magnitude of the first fixed attenuation value. The attenuator can be configured to be capable of providing a total attenuation value from approximately zero to a sum of the attenuation steps of the first group and the second group in increments of the second fixed attenuation value.

Low Loss Reflective Passive Phase Shifter using Time Delay Element with Double Resolution

A phase shifter for altering the phase of a radio frequency signal is disclosed herein. A Lange coupler is used having reflective ports that are coupled to artificial transmission lines. The artificial transmission lines provide a reflection transmission path, the length of which can be determined by digital control lines. Transistors placed along the length of the central trace provide independent paths to ground that serve to shorten the electrical length of the ATL. Accordingly, by selectively turning the transistors on/off, the electrical length of the ATL can be selected and thus the amount of phase delay introduced by the phase shifter.

APPARATUSES AND METHODS FOR SHIFTING A DIGITAL SIGNAL BY A SHIFT TIME TO PROVIDE A SHIFTED SIGNAL
20200044626 · 2020-02-06 ·

An apparatus for shifting a digital signal having a first sample rate by a shift time to provide a shifted signal having a second sample rate is provided. The apparatus includes a sample rate converter configured to provide a value of an interpolated signal at a compensated sample time as a sample of the shifted signal, the interpolated signal being based on the digital signal. The sample rate converter is configured to modify a time interval between a sample time of the digital signal and the compensated sample time based on the shift time.

Sampling rate synchronization between transmitters and receivers

Systems and methods are provided in which a wireless receiver can be configured to digitally synchronize a receive sampling rate to a transmit sampling rate, and may include a digital interpolator controlled by a timing control unit with a timing offset estimator. The timing control unit can be configured to calculate and output parameters to the digital interpolator. The digital interpolator can include a sample buffer followed by a fractional delay filter. Output parameters to the digital interpolator can include a fractional delay timing offset signal of the receiver relative to a transmitter timing signal and a buffer pointer control signal to control a position of the read pointer relative to a write pointer to compensate for subsample timing offset. The timing offset estimator can be configured to calculate and provide to the timing control unit a sampling period ratio control word and an instantaneous timing offset control word.

Synchronization of audio streams and sampling rate for wireless communication

Disclosed herein, among other things, are methods and apparatus for providing a time-stamp based controller for synchronization of sink or source sampling rate with external packet rate. A method for wireless communications includes receiving a transmission of a packet using a wireless transceiver of an electronic device, and using a processor of the electronic device to read a first value of a system timer and store the first value as an arrival time-stamp. The packet is decoded and processed by the processor, and sent to an output. When the processed packet is sent, a second value of the system timer is read, adjusted and stored as a departure time-stamp. The arrival time-stamp and the departure time-stamp are used to calculate an adjustment stimulus for a sample rate actuator of the electronic device. The sample rate actuator is configured to maintain synchronization of sampling rate with an external packet rate.