A clock driver circuit for low powered clock driving may include: a multiple phase divider; a buffer supplying at least one of multiple phases to the multiple phase divider at a center frequency that is an integer multiple of an input frequency; and wherein the multiple phase divider and the buffer share a same current from a supply rail.

A pseudo-random sequence generator for use within a universal lidar system and its corresponding method of operation. The pseudo-random sequence generator uses synchronized shift registers that are in series Binary adders are provided. The signal output of each of the shift registers is tapped and directed to the binary adders. High-speed switches are provided between the shift registers and the binary adders. The switches are programmed to connect only two of the shift registers to the binary adders for each of the pseudo-random patterns being generated. The binary adders generate an output signal that is received by the first shift register. The signal propagates through all the shift registers to the last shift register. The last shift register outputs a pseudo-random sequence.

A multiplier has a pair of charge reservoirs. The pair of charge reservoirs are connected in series. A first charge movement device induces charge movement to or from the pair of charge reservoirs at a same rate. A second charge movement device induces charge movement to or from one of the pair of reservoirs, the rate of charge movement programmed to one of add or remove charges at a rate proportional to the first charge movement device. The first charge movement device loads a first charge into a first of the pair of charge reservoirs during a first cycle. The first charge movement device and the second charge movement device remove charges at a proportional rate from the pair of charge reservoirs during a second cycle until the first of the pair of charge reservoirs is depleted of the first charge. The second charge reservoir thereafter holding the multiplied result.

A method for operating a gate driver system includes measuring a first parameter according to a first priority schedule synchronously to a first edge of a switching signal generated by a gate driver integrated circuit and having a variable duty cycle. The method includes after measuring the first parameter of the gate driver system and prior to a second edge of the switching signal, measuring at least a second parameter of the gate driver system according to a first round-robin schedule synchronously to the first edge of the switching signal.

An electronic device includes a driving control signal generation circuit configured to generate first and second driving control signals and a driving switching control signal. The electronic device also includes a switching control signal driving circuit configured to drive a switching control signal to a first voltage on the basis of the first driving control signal and the driving switching control signal or drive the switching control signal to a second voltage on the basis of the second driving control signal, depending on whether a power-down mode is performed.

The present disclosure provides a controller for controlling a GaN-based semiconductor device. The controller is configured to receive a current sensing signal V.sub.CS which is indicative of a drain-to-source current of the GaN-based semiconductor device and generate a control driving signal V.sub.DRV to the GaN-based semiconductor device such that a gate-to-source voltage V.sub.GS applied to the GaN-based semiconductor device for switching on the GaN-based semiconductor device is stabilized to a voltage value equal to a reference voltage V.sub.ref over an on-time duration. Impact of the change in the voltage drop across the current sensing resistor to the operation of the GaN-based semiconductor device is eliminated.

A power transistor module includes a power transistor device and a control circuit. The control circuit is electrically connected to the power transistor device for providing at least one gate voltage to drive the power transistor device, and adjusting the at least one gate voltage in response to an output power of the power transistor module. When the output power is greater than a predetermined power load, the at least one gate voltage has a first swing amplitude; and when the output power is less than or equal to the predetermined power load the at least one gate voltage has a second swing amplitude less than the first swing amplitude.

The invention relates to the field of power semiconductor devices. This invention discloses a drive circuit and device of a power switch. The input terminal of the drive circuit receives a pulse signal; the output terminal of the drive circuit is connected to a capacitor circuit. The capacitor circuit is used to provide a negative voltage for a first electrode of the power switch to turn off the power switch when the pulse signal is a turn-off signal; the drive circuit includes a capacitance adjustment unit. The capacitance adjustment unit includes a negative voltage adjustment element that can charge a capacitor whose voltage is lower than a predetermined voltage when the pulse signal is the turn-off signal.

A gate driver includes: an input pin for receiving switching control information from a controller; an output pin for driving a control terminal of a power transistor; a power supply pin for receiving power from an external supply; an input side electrically connected to the input pin; an output side electrically connected to the output pin and the power supply pin; and an isolation structure galvanically isolating the input side and the output side from one another. The output side is configured to transfer a fraction of the power received at the power supply pin to the input side over the isolation structure for powering the input side. The input side is configured to convey the switching control information received at the input pin to the output side over the isolation structure. A power electronic system that includes the gate driver is also described.

A control circuit includes a detection module configured to detect an operating condition of a semiconductor switching device; a determining module configured to determine a gate allowable voltage of the semiconductor switching device based on the operating condition; and an output module configured to output a control signal to a driving power supply circuit of the semiconductor switching device based on the gate allowable voltage, to control the driving power supply circuit to provide a gate on voltage that is not higher than the gate allowable voltage and that is positively correlated with the gate allowable voltage for the semiconductor switching device. When the operating condition of the semiconductor switching device becomes better, the gate allowable voltage of the semiconductor switching device is increased.