A circuit device includes a phase comparator that performs phase comparison between an input signal based on an oscillation signal and a reference signal, a processor that performs a digital signal process on phase comparison result data which is a result of the phase comparison so as to generate frequency control data, and an oscillation signal generation circuit that generates the oscillation signal having an oscillation frequency which is set on the basis of the frequency control data. The processor performs the digital signal process by using data used when a hold-over state is ended in a case where the hold-over state occurs due to the absence or the abnormality of the reference signal, and then the hold-over state is ended.

Provided are a digitally controlled oscillator and an electronic device including the digitally controlled oscillator. The digitally controlled oscillator includes a digital control unit and a power control oscillation unit. The digital control unit compensates for a difference between a feedback signal of an output power and a reference power set based on an input digital control signal and outputting an output power. The power control oscillation unit receives a signal related to the output power, and generates an output clock having an oscillation frequency in response to the signal related to the output power.

Provided are a digitally controlled oscillator and an electronic device including the digitally controlled oscillator. The digitally controlled oscillator includes a digital control unit and a power control oscillation unit. The digital control unit compensates for a difference between a feedback signal of an output power and a reference power set based on an input digital control signal and outputting an output power. The power control oscillation unit receives a signal related to the output power, and generates an output clock having an oscillation frequency in response to the signal related to the output power.

A method of compensating for the temperature related frequency drift of an oscillator. The method comprises using an external reference frequency signal to derive oscillator compensation data over a range of operating temperatures, storing the oscillator compensation data in a first table, and, for a given operating temperature, using the first table to obtain corresponding oscillator compensation data and applying that data to provide compensation for the temperature related frequency drift. The method further comprises defining, for the range of operating temperatures, a series of temperature slots each sub-divided into a series of temperature bins. The step of using an external reference frequency signal to derive oscillator compensation data over the range of operating temperatures comprises a) measuring an operating temperature and using the external reference frequency signal to determine oscillator compensation values for respective temperatures as the operating temperature varies; b) accumulating the determined oscillator compensation values in corresponding temperature bins of a second table; c) at spaced intervals in time, using the data accumulated in the temperature bins of the second table to determine or update the oscillator compensation data stored for one or more slots in the first table.

Embodiments disclosed herein provide an apparatus comprising a clock generation circuit configured to generate a first signal for a first time period and a second signal for a second time period, a charge pump circuit coupled to the clock generation circuit and configured to generate a first voltage and a second voltage based, at least in part, on the first time period and the second time period, and a comparison circuit coupled to the charge pump circuit, the comparison circuit configured to compare a difference between the first voltage and the second voltage with a threshold value and generate an active tracking enablement signal in response to determining that the difference between the first and second voltages exceeds the threshold value.

A device and method is presented to allow the high frequency clock generators and functional blocks of a wireless communication device to enter a very low power sleep state while the low frequency reference clock generator within the wireless communications device remains in an active state. The timing block provides methods of increasing and maintaining accuracy of the system timer which may have been reduced by temperature variation or manufacturing defects. The timing block also allows for selection of the highest accuracy clock from among multiple high frequency clock references. A device for timing control is presented comprising at least one high frequency reference clock, a low frequency reference clock and a timing controller for generating a system timer, wherein the timing controller selects one of the at least one high frequency reference clock and processes the low frequency reference clock with the selected high frequency reference clock.

A frequency stable oscillator with compensation circuit, the device includes a ring oscillator circuit having S number of stages, a current generator circuit configured to generate a first current, a replica circuit having an inverter with output connected to input, configured to generate a first voltage upon dumping a second current onto the replica circuit, a first operational transconductance amplifier (OTA) with an input as the first voltage, configured to generate a third current and a current mirror circuit configured to generate a fourth current by adding the first current and the third current in a particular ratio M:N, wherein the inverter of the replica circuit is equivalent to a single stage of the ring oscillator circuit and wherein the fourth current is the total current for the ring oscillator circuit and is as close as possible to S times the second current.

A frequency stable oscillator with compensation circuit, the device includes a ring oscillator circuit having S number of stages, a current generator circuit configured to generate a first current, a replica circuit having an inverter with output connected to input, configured to generate a first voltage upon dumping a second current onto the replica circuit, a first operational transconductance amplifier (OTA) with an input as the first voltage, configured to generate a third current and a current mirror circuit configured to generate a fourth current by adding the first current and the third current in a particular ratio M:N, wherein the inverter of the replica circuit is equivalent to a single stage of the ring oscillator circuit and wherein the fourth current is the total current for the ring oscillator circuit and is as close as possible to S times the second current.

An audio signal amplification device includes: a clock generation circuit that generates a clock for use in amplifying an audio signal; and a power supply circuit that generates direct current power, which is supplied to the clock generation circuit, from input power. The power supply circuit includes: a constant voltage generation circuit that generates direct current power of a constant voltage from the input power; a first capacitor; a first charging circuit that charges the first capacitor by using the input power; and a selection circuit. The selection circuit selects one direct current power of the direct current power generated in the constant voltage generation circuit and of direct current power charged to the first capacitor, and supplies the selected direct current power to the clock generation circuit.

A radio frequency (RF) frequency synthesizer includes a chassis housing that holds components of the RF frequency synthesizer. The chassis housing is installable into an instrument cabinet. A pair of mounting brackets are connected to opposing interior sides of the chassis housing and receive an A-Frame assembly which supports vibration sensitive RF circuitry and RF components. The A-Frame assembly is attached to the pair of mounting brackets in the chassis housing and provide a spatial separation between the kinematic inputs and the vibration sensitive RF circuitry and RF components. The A-Frame assembly includes a folded sheet, the folded sheet defining an angle between a first planar region and a second planar region, and may include a planar frame cross-member attached to the first planar region and the second planar region, the planar frame cross-member spanning the angle between the first and second planar regions.