Provided is a phase locked loop (PLL) that generates an output clock signal corresponding to a reference clock signal, the PLL including a first phase interpolator configured to generate a first interpolator clock signal that has a first time delay from the output clock signal and a second phase interpolator configured to generate a second interpolator clock signal that has a second time delay from the output clock signal. The PLL controls a frequency of the output clock signal based on a multiplexing the first interpolator clock signal and the second interpolator clock signal.

Various implementations described herein are directed to an integrated circuit. The integrated circuit may include a comparator stage, a resistor, a capacitor, and active switches arranged to provide a clock signal having a time period that is independent of a first source voltage. Independence may be achieved by using a second source voltage derived from the first source voltage as a fixed ratio.

Provided is an oscillation apparatus and an oscillation control apparatus including a first control section that generates a first control signal that controls an oscillation frequency of an oscillator, based on a temperature detection result of a temperature detecting section; an encoder that generates a feedback signal; a second control section that generates a second control signal that controls the oscillation frequency of the oscillator, based on the temperature detection result of the temperature detecting section, an external input signal input from outside, and the feedback signal; an oscillation circuit that sets the oscillation frequency of the oscillator, based on the first control signal and the second control signal; and a reference voltage generating section that generates a reference voltage, wherein the encoder generates the feedback signal by comparing the second control signal and the reference voltage.

A generator and method for tuning the generator are disclosed. The method includes setting the frequency of power applied by the generator to a current best frequency and sensing a characteristic of the power applied by the generator. A current best error based upon the characteristic of the power is determined, and the frequency of the power at the current best frequency is maintained for a main-time-period. The frequency of the power is then changed to a probe frequency and maintained at the probe frequency for a probe-time-period, which is less than the main-time-period. The current best frequency is set to the probe frequency if the error at the probe frequency is less than the error at the current best frequency.

A generator and method for tuning the generator are disclosed. The method includes setting the frequency of power applied by the generator to a current best frequency and sensing a characteristic of the power applied by the generator. A current best error based upon the characteristic of the power is determined, and the frequency of the power at the current best frequency is maintained for a main-time-period. The frequency of the power is then changed to a probe frequency and maintained at the probe frequency for a probe-time-period, which is less than the main-time-period. The current best frequency is set to the probe frequency if the error at the probe frequency is less than the error at the current best frequency.

An oscillator configured to generate an oscillation signal is provided. The oscillator includes a transistor pair and a cross-coupled transistor pair. The transistor pair is coupled to a first current source and has a first transconductance. The first transconductance is changed in response to a current value of the first current source. The cross-coupled transistor pair is coupled to a second current source and has a second transconductance. The second transconductance is changed in response to a current value of second current source. The transistor pair and the cross-coupled transistor pair are mutually coupled by a plurality of inductors. A frequency of the oscillation signal is determined according to the first transconductance and the second transconductance. Furthermore, a clock generator and a method for generating a clock signal thereof are also provided.

An oscillator configured to generate an oscillation signal is provided. The oscillator includes a transistor pair and a cross-coupled transistor pair. The transistor pair is coupled to a first current source and has a first transconductance. The first transconductance is changed in response to a current value of the first current source. The cross-coupled transistor pair is coupled to a second current source and has a second transconductance. The second transconductance is changed in response to a current value of second current source. The transistor pair and the cross-coupled transistor pair are mutually coupled by a plurality of inductors. A frequency of the oscillation signal is determined according to the first transconductance and the second transconductance. Furthermore, a clock generator and a method for generating a clock signal thereof are also provided.

A circuit includes an oscillator having a driver and a resonator. The driver receives a supply voltage at a supply input and provides a drive output to drive the resonator to generate an oscillator output signal. A power converter receives an input voltage and generates the supply voltage to the supply input of the driver. A temperature tracking device in the power converter controls the voltage level of the supply voltage to the supply input of the driver based on temperature such that the supply voltage varies inversely to the temperature of the circuit.

A system is based on an IC. A first component of the IC generates a signal that clocks the IC at a target operating frequency. A period corresponding to the target clock frequency exceeds a duration of a longest critical path associated with the IC. The first component and synchronous logic of the IC clocked therewith, each functions with the core supply voltage, which may be supplied to each via the same power supply rail. A second IC component detects errors that relate to an operation of the IC at the target clock frequency and determines a level for adjusting the core supply voltage. The Vdd adjustment ameliorates the frequency error. The voltage determination uses closed loop dynamic voltage and frequency scaling.

A system is based on an IC. A first component of the IC generates a signal that clocks the IC at a target operating frequency. A period corresponding to the target clock frequency exceeds a duration of a longest critical path associated with the IC. The first component and synchronous logic of the IC clocked therewith, each functions with the core supply voltage, which may be supplied to each via the same power supply rail. A second IC component detects errors that relate to an operation of the IC at the target clock frequency and determines a level for adjusting the core supply voltage. The Vdd adjustment ameliorates the frequency error. The voltage determination uses closed loop dynamic voltage and frequency scaling.