Patent classifications
H03L7/00
Mechanical shock detection and phase and frequency correction of a MEMS mirror
A system for driving a microelectromechanical system (MEMS) oscillating structure includes a phase error detector configured to generate a phase error signal based on measured event times and expected event times of the MEMS oscillating structure oscillating about a rotation axis; a disturbance event detector configured to detect a disturbance event based on the phase error signal and a disturbance threshold value; and a phase frequency detector (PFD) and correction circuit configured to, in response to the detected disturbance event, monitor for a plurality of measured crossing events of the MEMS oscillating structure oscillating about the rotation axis, generate a first compensation signal based on at least a first measured crossing event and a second measured crossing event to correct a frequency of the MEMS oscillating structure, and generate a second compensation signal based on a third measured crossing event to correct a phase of the MEMS oscillating structure.
Interface system
According to one embodiment, an interface system includes a receiver, a first clock generator, a second clock generator, and a sampling circuit. The receiver is configured to receive a first clock and serial data from a host. The first clock generator includes a first voltage controlled oscillator (VCO) and is configured to generate a second clock on the basis of the first clock. The second clock generator includes a second voltage controlled oscillator (VCO) and is configured to generate a third clock on the basis of the serial data. The sampling circuit is configured to sample reception data on the basis of the third clock and the serial data.
Interface system
According to one embodiment, an interface system includes a receiver, a first clock generator, a second clock generator, and a sampling circuit. The receiver is configured to receive a first clock and serial data from a host. The first clock generator includes a first voltage controlled oscillator (VCO) and is configured to generate a second clock on the basis of the first clock. The second clock generator includes a second voltage controlled oscillator (VCO) and is configured to generate a third clock on the basis of the serial data. The sampling circuit is configured to sample reception data on the basis of the third clock and the serial data.
Synchronization with synthesized audio clock
The invention provides a method for providing a synchronization in a computer network for synchronized playback of audio an/or video by a plurality of separate devices. Each separate device generates a virtual clock in response to a timing of the audio codec of a received audio stream. Especially, segmented time is used as reference time. Either the virtual clock is generated directly in response to the tick counter of the audio codec, or by a periodic measurement of the timing of the audio codec extrapolated by a monotonic clock. A sample rate converter may be used to slightly adjust the frequency of the virtual clock.
Synchronization with synthesized audio clock
The invention provides a method for providing a synchronization in a computer network for synchronized playback of audio an/or video by a plurality of separate devices. Each separate device generates a virtual clock in response to a timing of the audio codec of a received audio stream. Especially, segmented time is used as reference time. Either the virtual clock is generated directly in response to the tick counter of the audio codec, or by a periodic measurement of the timing of the audio codec extrapolated by a monotonic clock. A sample rate converter may be used to slightly adjust the frequency of the virtual clock.
Scalable, electro-optically induced force system and method
A technique is disclosed for electro-optically inducing a force to fabricated samples and/or devices with laser light. The technique uses the interaction of the oscillating electric field of the laser beam in opposition with the electric field produced by an appropriate electric charge carrier to achieve a net repulsive (or attractive) force on the component holding the electric charge. In one embodiment, force is achieved when the field near the charge carrier is modulated at a subharmonic of the electric field oscillation frequency of the laser and the relative phases of the light field and electric charge carrier field are controlled to provide optimal repulsion/attraction. The effect is scalable by applying the technique to an array of charge carrier fields sequentially as well as using higher power lasers and higher carrier field voltages.
Scalable, electro-optically induced force system and method
A technique is disclosed for electro-optically inducing a force to fabricated samples and/or devices with laser light. The technique uses the interaction of the oscillating electric field of the laser beam in opposition with the electric field produced by an appropriate electric charge carrier to achieve a net repulsive (or attractive) force on the component holding the electric charge. In one embodiment, force is achieved when the field near the charge carrier is modulated at a subharmonic of the electric field oscillation frequency of the laser and the relative phases of the light field and electric charge carrier field are controlled to provide optimal repulsion/attraction. The effect is scalable by applying the technique to an array of charge carrier fields sequentially as well as using higher power lasers and higher carrier field voltages.
High stability optoelectronic oscillator and method
An optoelectronic oscillator (OEO) including a drift compensation circuit is provided. The OEO includes a set of optical domain components communicatively coupled with a set of RF domain components. The RF domain components include a mode selection filter, a phase locked loop (PLL) and a drift compensation circuit communicatively coupled between the mode selection filter and the PLL. The mode selection filter provides a mode selection result to the drift compensation circuit. The drift compensation circuit phase modulates the mode selection result in a vector based coordinate system to maintain a drift compensated mode selection result within a locking bandwidth of the PLL, and to minimize phase shifting from accumulating phase drift. The PLL detects a phase difference between the drift compensated mode selection result and a reference signal, for use in maintaining the PLL in a phase lock with the reference signal, in particular over wide operational temperature ranges.
High stability optoelectronic oscillator and method
An optoelectronic oscillator (OEO) including a drift compensation circuit is provided. The OEO includes a set of optical domain components communicatively coupled with a set of RF domain components. The RF domain components include a mode selection filter, a phase locked loop (PLL) and a drift compensation circuit communicatively coupled between the mode selection filter and the PLL. The mode selection filter provides a mode selection result to the drift compensation circuit. The drift compensation circuit phase modulates the mode selection result in a vector based coordinate system to maintain a drift compensated mode selection result within a locking bandwidth of the PLL, and to minimize phase shifting from accumulating phase drift. The PLL detects a phase difference between the drift compensated mode selection result and a reference signal, for use in maintaining the PLL in a phase lock with the reference signal, in particular over wide operational temperature ranges.
NOTCH FILTER CALIBRATION IN LC OSCILLATORS FOR SUPPLY NOISE REJECTION
Embodiments herein relate to an apparatus and method for calibrating a notch filter which filters a power supply signal for a voltage-controlled oscillator (VCO). In one aspect, a control circuit performs a number of calibration cycles for the filter to determine a value of a calibration code for the filter which minimizes a change in a frequency of the output signal of the VCO due to a change in the voltage of the power supply signal. After each calibration cycle, the calibration code is adjusted based on whether the frequency of the output signal increase or decreases. The calibration cycles can therefore converge on an optimal calibration code which minimizes the change in frequency due to the change in voltage. This minimizes a sensitivity of the VCO to noise in the power supply signal.