A system and method for system, method and apparatus for phase hits and microphonics cancellation. In addition to a first RF synthesizer source, a device also includes a second stable reference signal source that operates at a lower frequency as compared to the RF synthesizer source. The second stable reference signal source is selected with good phase noise characteristics and can be used to correct phase error events.

A system and method for system, method and apparatus for phase hits and microphonics cancellation. In addition to a first RF synthesizer source, a device also includes a second stable reference signal source that operates at a lower frequency as compared to the RF synthesizer source. The second stable reference signal source is selected with good phase noise characteristics and can be used to correct phase error events.

The invention relates to a resonator circuit, the resonator circuit comprising a transformer comprising a primary winding and a secondary winding, wherein the primary winding is inductively coupled with the secondary winding, a primary capacitor being connected to the primary winding, the primary capacitor and the primary winding forming a primary circuit, and a secondary capacitor being connected to the secondary winding, the secondary capacitor and the secondary winding forming a secondary circuit, wherein the resonator circuit has a common mode resonance frequency at an excitation of the primary circuit in a common mode, wherein the resonator circuit has a differential mode resonance frequency at an excitation of the primary circuit in a differential mode, and wherein the common mode resonance frequency is different from the differential mode resonance frequency.

A safety shut-off system and method are provided for eliminating power to a load in the event of smoke detection. The system may comprise a device located at the appliance for detecting a signal from a smoke detector, and cutting power to the appliance only when the appliance is in use. The device may be synchronized with any standard smoke alarm signal to reduce the number of false positive shut-offs. The system may also comprise a smoke alarm hard-wired to a circuit breaker, for shutting off power to all appliances on a particular breaker upon receipt of a signal from the smoke alarm, and only when the appliances on the breaker are in use. The system may also have the ability to shut off one breaker, multiple breakers, or all breakers at different time increments to actively prevent and reduce the damages caused by fires.

A safety shut-off system and method are provided for eliminating power to a load in the event of smoke detection. The system may comprise a device located at the appliance for detecting a signal from a smoke detector, and cutting power to the appliance only when the appliance is in use. The device may be synchronized with any standard smoke alarm signal to reduce the number of false positive shut-offs. The system may also comprise a smoke alarm hard-wired to a circuit breaker, for shutting off power to all appliances on a particular breaker upon receipt of a signal from the smoke alarm, and only when the appliances on the breaker are in use. The system may also have the ability to shut off one breaker, multiple breakers, or all breakers at different time increments to actively prevent and reduce the damages caused by fires.

According to one embodiment, an interface system includes a receiver, a first clock generator, a second clock generator, and a sampling circuit. The receiver is configured to receive a first clock and serial data from a host. The first clock generator includes a first voltage controlled oscillator (VCO) and is configured to generate a second clock on the basis of the first clock. The second clock generator includes a second voltage controlled oscillator (VCO) and is configured to generate a third clock on the basis of the serial data. The sampling circuit is configured to sample reception data on the basis of the third clock and the serial data.

According to one embodiment, an interface system includes a receiver, a first clock generator, a second clock generator, and a sampling circuit. The receiver is configured to receive a first clock and serial data from a host. The first clock generator includes a first voltage controlled oscillator (VCO) and is configured to generate a second clock on the basis of the first clock. The second clock generator includes a second voltage controlled oscillator (VCO) and is configured to generate a third clock on the basis of the serial data. The sampling circuit is configured to sample reception data on the basis of the third clock and the serial data.

A reference time generator including a first clock source including a reference synthesizer and cesium atomic clock configured to produce a cesium reference signal and a cesium QOT metric, a second clock source including a reference synthesizer and rubidium atomic clock configured to produce a rubidium reference signal and a rubidium QOT metric, and a circuit for selecting from the clock sources one reference signal based on the best QOT metric.

A phase-shifter circuit arranged to receive a reference timing signal and to output a phase-shifted form of the reference timing signal. The phase-shifter circuit comprises a delay circuit arranged to receive the reference timing signal and a delay control signal, and to delay transitions within the reference timing signal to generate the phase-shifted form of the reference timing signal, wherein the amount of delay applied by the delay circuit to the transitions within the reference timing signal is controllable by the delay control signal. The phase-shifter circuit further comprises a delay control circuit arranged to receive a re-timed signal comprising transitions re-timed to transitions of the phase-shifted form of the reference timing signal output by the phase-shifter circuit, and to generate the delay control signal for the delay circuit based on the received re-timed signal.

An apparatus for mitigating nonlinearity-induced spurs and noise in a fractional-N frequency synthesizer

A digital delta-sigma modulator (DDSM) is disclosed with an input signal x[n], an output signal y[n], a quantization error signal e[n] and a dither signal d[n], having an equation described in the z-domain by

Y(z)=STF(z)X(z)+DTF(z)D(z)−NTF(z)E(z)

wherein Y(z), X(z), D(z) andE(z) are z-transforms of the output signal, the input signal, the dither signal, and the quantization error signal, and wherein STF (z), DTF(z) and NTF(z) correspond to a transfer function of the input signal, a transfer function of the dither signal, and a transfer function of the quantization error signal, and wherein the transfer function of the quantization error signal is of the form:

[00001]$\mathrm{NTF}\left(z\right)={\mathrm{Az}}^{-Q}\left(1-z^{-1}\right)\left(1+\underset{i=1}{\overset{K}{.Math.}}{c}_i{z}^{-i}\right)$

where A , Q and K are constants, coefficients c.sub.i are real valued and c.sub.K≠0 and wherein at least one of the zeroes z.sub.j of

[00002]$\left(1+\underset{i=1}{\overset{K}{.Math.}}{c}_i{z}^{-i}\right)$

satisfies z.sub.j≠+1 for j=1, 2, . . . , K