The invention provides a system improving signal handling, e.g., transmission and/or processing. In an embodiment, the system may include a filter circuit, a magnitude bit truncation circuit and a utility circuit. The filter circuit may be coupled to a target signal which contains one or more desired signals at one or more interested bands, for attenuating each said interested band to form a filtered signal. The magnitude bit truncation circuit may be coupled to the filter circuit, for truncating one or more bits of each sample of the filtered signal to form a truncated signal. The utility circuit may be coupled to the magnitude bit truncation circuit, for handling the truncated signal to implement handling of the target signal, so as to reduce resource requirement and enhance error tolerance comparing with directly handling the target signal.

A variety of methods, controllers and electric machine systems are described that facilitate pulsed control of electric machines (e.g., electric motors and generators) to improve the machine's energy conversion efficiency. Under selected operating conditions, the electric machine is intermittently driven (pulsed). The pulsed operation causes the output of the electric machine to alternate between a first output level and a second output level that is lower than the first output level. The output levels are selected such that at least one of the electric machine and a system that includes the electric machine has a higher energy conversion efficiency during the pulsed operation than the electric machine would have when operated at a third output level that would be required to drive the electric machine in a continuous manner to deliver the desired output. In some embodiments, the second output level is zero torque.

A sigma delta modulator comprises an input configured to receive an input analog signal; a summing junction configured to subtract a feedback analog signal from the input analog signal; a first stage including a low pass filter coupled to the summing junction, wherein the low pass filter is configured to generate a first filtered signal; a second stage coupled to the low pass filter, configured to generate a second filtered signal by an active filter; a back-end stage coupled to the second stage, wherein the back-end stage comprises an analog to digital converter configured to convert the 2.sup.nd filtered signal to a digital output signal by sampling at a predetermined sampling frequency (fs); and a feedback path for routing the digital output signal to the summing junction, wherein the feedback path comprises a digital to analog converters, DAC, converting the digital output signal to the feedback analog signal.

Described herein is an apparatus and method for enhancing the dynamic range of an analog-to-digital converter (ADC). In one embodiment of the present approach, an analog input signal is amplified in a programmable gain amplifier (PGA) before the ADC receives the signal, so that the gain applied to an input signal, and gain (or attenuation) later applied in order to balance the overall gain of the circuit, occurs only in either the analog domain; in the prior art, gain occurs partly in each domain. The ADC gain is then adjusted to compensate for gain of the PGA and balance the overall gain of the circuit. In another embodiment, the ADC gain is adjusted, and gain of a digital gain element that receives the signal from the ADC is adjusted to compensate for the ADC gain and balance the overall gain of the circuit, eliminating the need for a PGA.

Provided is a system that includes: a plurality of touch sensors sharing a signal medium, each touch sensor in the plurality being configured to output set of frequencies on the signal medium responsive to being touched, each touch sensor in the plurality being configured to output a different set of frequencies; an analog to digital converter electrically coupled to the signal medium and configured to receive the sets of frequencies from the touch sensors and convert the sets of frequencies to digital representations of the sets of frequencies in the time domain; a processor communicatively coupled to the analog to digital converter and configured to execute a fast Fourier transform of the digital representations from the time domain into digital representations in the frequency domain; and an address decoder operative to transform the digital representations in the frequency domain into identifiers of touch sensors among the plurality of touch sensors.

An excess loop delay compensation (ELDC) technique for use with a successive approximation register (SAR) based quantizer in a continuous time delta-sigma ADC is described. The techniques can efficiently program and calibrate the ELD gain in ELD compensation SAR quantizers. An ELDC circuit can include a charge pump having a digitally programmable capacitance to adjust a gain, such as the gain of the ELDC digital-to-analog converter (DAC) or the gain of the SAR DAC.

An excess loop delay compensation (ELDC) technique for use with a successive approximation register (SAR) based quantizer in a continuous time delta-sigma ADC is described. The techniques can efficiently program and calibrate the ELD gain in ELD compensation SAR quantizers. An ELDC circuit can include a charge pump having a digitally programmable capacitance to adjust a gain, such as the gain of the ELDC digital-to-analog converter (DAC) or the gain of the SAR DAC.

Methods, systems, and devices for thermometer coding for driving non-binary signals are described. A set of drivers may be used to drive a signal line, with each of the drivers calibrated to have different individual drive strengths. To drive a signal line to successive voltages in accordance with a non-binary modulation scheme, additional individual drivers of the set may be used. The different drive strengths of the individual drivers of the set may scale in non-linear fashion, which may offset non-linearities associated with the individual drivers as additional individual drivers of the set are activated.

Methods/systems employ randomly jittered under-sampling to reduce a sampling rate required to estimate the amplitude of high-frequency signals in circuit breakers, power meters, and other digital signal processing applications. The methods/systems can greatly reduce the nominal sampling rate for applications where RMS, peak and mean estimates of the signal are desired for both the entire band-limited signal and separate estimates for each frequency component. This can in turn result in large cost savings, as less complex and thus less expensive controllers and related components may be used to perform the sampling. As well, the methods/systems herein can provide reasonably accurate waveform estimates that allow additional cost savings in bill of materials (BOM) and printed circuit board assembly (PCBA) footprint and real-estate by eliminating the need for certain analog components, such as signal conditioning components.

A calibration circuit, including: a signal generator circuit configured to generate a modulated analog input signal, which is based on a digital input word that is modulated; an Analog-to-Digital Converter (ADC) configured to convert an analog reference signal to a digital calibration word, wherein the analog reference signal is a low-pass-filtered version of the analog input signal generated by the signal generator circuit; and a feedback circuit configured to output the digital input word by adjusting the digital calibration word depending on a digital feedback signal, which is based on a modulated version of the analog reference signal, wherein the signal generator circuit, the ADC, and the feedback circuit are provided on a same chip.