The present disclosure discloses a touch sensing signal processing circuit which senses a change in capacitance of a sensing node for touch sensing and provides a logic signal corresponding to the touch sensing. The touch sensing signal processing circuit of the present disclosure is configured using a delta-sigma analog to digital converter. Auto-tuning may be performed by delta-sigma analog conversion.

A method and apparatus are described for bio-impedance measurement using voltage to current conversion. In one example, a bio-impedance transducer includes an input stage to receive a bio-impedance signal having an oscillating voltage from two electrodes, the electrodes being coupled to a body, a resistance across the two electrodes to determine an alternating current of the bio-impedance signal, a gain stage coupled to the resistance to amplify the alternating current, a down converter coupled to the gain stage to convert the amplified alternating current to a direct current bio-impedance signal, and an analog-to-digital converter coupled to the down converter to convert the direct current bio-impedance signal to a digital bio-impedance signal.

A power supply monitor includes a delta-sigma modulator including an input receiving a binary number and an output providing a pulse-density modulated signal, the delta-sigma modulator operable to scale the pulse-density modulated signal based on the binary number. A fast droop detector circuit includes a level shifter providing the modulated signal referenced to a clean supply voltage. A lowpass filter is coupled between the level shifter and a comparator. The comparator produces a droop detection signal at said output responsive to a monitored supply voltage dropping below a predetermined level relative to the filtered signal.

A display device includes a display panel, a noise detection circuit and a processing circuit. The display panel has a touch control function and is configured to detect a contact location of an object to output a touch signal. The noise detection circuit is configured to detect and process a voltage signal of a common electrode of the display panel to output a free run signal and a noise sync signal. The processing circuit is configured to receive the free run signal and the noise sync signal. When the free run signal is at a first level, the processing circuit receives the touch signal in real-time. When the free run signal is at a second level different to the first level, the processing circuit receives the touch signal according to the noise sync signal. The present disclosure also provides a control method for the display device.

A signal processor and method. The signal processor includes a signal current path. The signal processor includes a transconductor. The transconductor has an input operable to receive an input voltage of the signal processor. The transconductor also has an output operable to output a current based on the input voltage. The signal processor also includes a processing stage coupled to the output of the transconductor to receive and process the current outputted by the transconductor. The signal processor further includes a current replicator operable to generate a replica current proportional to the current outputted by the transconductor. The signal processor also includes a comparator operable to compare an output of the current replicator with a reference. The signal processor further includes a current limiter operable to limit the current outputted by the transconductor based on the comparison of the output of the current replicator with the reference.

A high resolution analog to digital converter (ADC) with improved bandwidth senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. In addition, quantization noise is subtracted from the digital output signal thereby extending the operational bandwidth of the ADC. In certain examples, the operational bandwidth of the ADC extends up to 100s of kHz (e.g., 200-300 kHz), or even higher.

Techniques are provided for phase coherent frequency synthesis. An embodiment includes a first phase accumulator to accumulate a frequency control word (FCW) at a clocked rate to produce a first digital phase signal representing phase data corresponding to phase points on a first sinusoidal waveform. The embodiment also includes a second phase accumulator to produce an incrementing reference count at the clocked rate and multiply it by the FCW to produce a second digital phase signal representing phase data corresponding to phase points on a second sinusoidal waveform. The multiplication is performed in response to change in the FCW. The embodiment further includes a multiplexer to select between the first and second digital phase signals based on completion of the multiplication. The embodiment also includes a phase-to-amplitude converter to generate digital amplitude data corresponding to the phase points on a sinusoidal waveform associated with the selected digital phase signal.

A photoelectric conversion apparatus includes a light receiving circuit configured to convert light into an electrical signal, a readout circuit configured to read out an analog signal corresponding to the electrical signal, a ΔΣ A/D converter configured to convert the analog signal into a digital signal, and a control circuit configured to change a gain of the photoelectric conversion apparatus in accordance with a change of a driving mode of the photoelectric conversion apparatus. The analog signal read out by the readout circuit is an analog current signal. The readout circuit includes a variable resistor on a signal path for supplying the analog current signal to the ΔΣ A/D converter. The control circuit changes the gain of the photoelectric conversion apparatus by changing a resistance value of the variable resistor.

A digital microphone includes at least one integrator; a state detection and parameter control component directly coupled to an output of the integrator; and a signal processing component coupled to an output of the state detection and parameter control component, wherein a parameter of the signal processing component includes a first value in a first operational mode and a second value in a second operational mode different from the first operational mode.

An image sensor may include an array of image pixels arranged in rows and columns. The columns of pixels are coupled to corresponding delta sigma modulators. Each group of delta sigma modulators may be coupled to a column memory circuit. The column memory circuit may receive bits serially from each pixel column in the group. Once all bits in a bit stream from each pixel column have been stored into the column memory circuit, the column memory circuit may output one bit stream at a time to a shared filter circuit. The shared filter circuit may process an entire bit stream associated with a given column in one cycle. Sharing the filter circuit among multiple pixel columns can dramatically reduce circuit area for the image sensor.