Techniques are described for wireless communication. One method includes segmenting a payload into a plurality of code blocks; generating, for each code block, a cyclic redundancy check (CRC); encoding each code block and associated CRC in one or more codewords of a plurality of codewords; and transmitting the codewords. The encoding is based at least in part on a low density parity check code (LDPCC) encoding type. Another method includes receiving a plurality of codewords associated with a payload encoded using a LDPCC encoding type; decoding a set of the codewords associated with the first payload and a CRC; and transmitting one of an acknowledgement (ACK) or a non-acknowledgement (NAK) for the set of the codewords.

A transmission device, a transmission method, a reception device, and a reception method for securing good communication quality in data transmission using an LDPC code. The LDPC coding is performed using a parity check matrix with the code length N of 17280 bits and the coding rate r of 13/16 or 14/16. The LDPC code includes information bits and parity bits, and the parity check matrix includes an information matrix portion corresponding to the information bits and a parity matrix portion corresponding to the parity bits. The information matrix portion is represented by a parity check matrix initial value table, and the parity check matrix initial value table is a table representing positions of elements of 1 of the information matrix for every 360 columns.

Apparatuses for transmitting and receiving a signal in a communication system are provided. An apparatus of a receive device includes a receiver configured to receive, from a transmit device, a signal comprising remaining bits of parity bits after puncturing, wherein the parity bits are obtained by adding at least one shortened bit to information bits to obtain input bits for an encoding, if a number of the information bits is less than a number of the input bits for the encoding; and a hardware processor configured to determine a number of puncture bits for the parity bits, generate an output signal by adding at least one value corresponding to the number of the puncture bits to the signal, and decode the output signal.

A system and method for providing error control coding for backhaul applications are disclosed. Data is first encoded using Reed-Solomon (RS) coding. The output RS blocks are then turbo coded. The size of the output RS blocks is selected to match the input of the turbo encoder. The bits from the RS blocks may be interleaved to create the input turbo blocks. Cyclic Redundancy Check (CRC) parity bits may be added to the data prior to RS coding.

Methods, systems, and apparatus are provided for encoding code blocks for transmission in a wireless communication system. An example encoding method in a wireless communication system includes determining, for one or more code blocks of a transport block, that at least one of a plurality of criteria is met, wherein the plurality of criteria includes that a coding rate (R) is less than or equal to ¼ or that a transport block size (TBS) is less than or equal to 3824 bits and the R is less than or equal to ⅔. The one or more code blocks are encoded using low-density parity-check (LDPC) base graph 2, wherein a maximum code block size is 3840 bits. The one or more encoded code blocks are transmitted over the wireless network.

Provided are a bit flipping device and method and a computer readable program for the same. The bit flipping device for input data having a two-dimensional array pattern includes: a clustering unit configured to generate at least one input data sequence based on the two-dimensional array pattern of the input data and classify the input data sequence into at least one cluster according to a preset method; and a bit flipping unit configured to perform bit flipping on erroneous bits in the input data sequence based on the classified cluster. Therefore, it is possible to further reduce inefficiency while further reducing system complexity compared to the existing error correction code-based bit flipping method by coupling the bit flipping device to an output side of a partial response maximum likelihood (PRML) detector to classify an output value of the PRML detector into at least one cluster and perform bit flipping based on the classified result.

The invention relates to a detection circuit, a detection method, an electronic device, and a computer-readable storage medium. The detection circuit includes: an error correction coding module configured to obtain data to be checked, and perform, based on an error correction coding logic, error correction coding on the data to be checked, to output target coded data; a data mask interface configured to receive comparison coded data, where the comparison coded data is associated with ideally coded data of the data to be checked; a comparison checking module configured to perform a checking comparison on the target coded data and the comparison coded data to output a checking comparison result; and a logic verification module configured to determine a coding verification result of the error correction coding module based on the checking comparison result. The comparison checking data verifies correctness of the error correction coding logic.

A parity interleaving apparatus and method for fixed length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit.

This application discloses a data transmission method, apparatus, and system. The method includes: generating a to-be-sent bit sequence, where the to-be-sent bit sequence includes one or more bits in a bit sequence having a length of (N−M), where N is a length of a mother code for polar encoding, M is a length of encoded bits obtained after rate matching is performed on a bit sequence having a length of N, N is m raised to the power of an integer, m is a positive integer greater than 1, M is a positive integer, and N>M; and sending the generated bit sequence. A corresponding apparatus and system are further disclosed. In this application, in this data transmission solution, an additional coding gain is generated during decoding, so that a decoding FER is reduced, and decoding performance is improved.

A method and a decoder for receiving a message encoded in Turbo Codes and modulated for transmission as an analog signal includes: (a) demodulating the analog signal to recover the Turbo Codes; and (b) decoding the Turbo Codes to recover the message using an iterative Turbo Code decoder, wherein the decoding includes performing an error detection after a predetermined number of iterations of the Turbo Code decoder to determine whether or not an error has occurred during the transmission. The predetermined number of iterations may be, for example, two. Depending on the result of the error detection, the decoding may stop, a request for retransmission of the message may be sent, or further iterations of decoding in the Turbo Code decoder may be carried out.