An example method of compressing a data set includes determining whether individual values from a data set correspond to a first category or a second category of values. Based on one of the values corresponding to the first category, the value is added to a compressed data set. Based on one of the values corresponding to the second category, the value is excluded from the compressed data set, and a statistical distribution of values of the second category is updated based on the value. During a first phase, the determining is performed for a plurality of values from a first portion of the data set based on comparison of the values to criteria. During a second phase, the determining is performed for a plurality of values from a second portion of the data set based on the statistical distribution.

An example method of compressing a data set includes determining whether individual values from a data set correspond to a first category or a second category of values. Based on one of the values corresponding to the first category, the value is added to a compressed data set. Based on one of the values corresponding to the second category, the value is excluded from the compressed data set, and a statistical distribution of values of the second category is updated based on the value. During a first phase, the determining is performed for a plurality of values from a first portion of the data set based on comparison of the values to criteria. During a second phase, the determining is performed for a plurality of values from a second portion of the data set based on the statistical distribution.

A decoder with reduced power consumption is provided. The decoder includes a first circuit and a second circuit for holding data. The second circuit includes a first transistor, a second transistor, and a third transistor. The first transistor and the second transistor include an oxide semiconductor in a channel formation region. The third transistor includes silicon in a channel formation region. A gate of the second transistor is electrically connected to one of a source and a drain of the first transistor and a gate of the third transistor is electrically connected to one of a source and a drain of the second transistor. The decoder is configured to provide or stop power supply to the semiconductor device depending on a packet ID of a header portion of the data and to perform data storing or restoring of data between the first circuit and the second circuit.

A decoder with reduced power consumption is provided. The decoder includes a first circuit and a second circuit for holding data. The second circuit includes a first transistor, a second transistor, and a third transistor. The first transistor and the second transistor include an oxide semiconductor in a channel formation region. The third transistor includes silicon in a channel formation region. A gate of the second transistor is electrically connected to one of a source and a drain of the first transistor and a gate of the third transistor is electrically connected to one of a source and a drain of the second transistor. The decoder is configured to provide or stop power supply to the semiconductor device depending on a packet ID of a header portion of the data and to perform data storing or restoring of data between the first circuit and the second circuit.

A decoder with reduced power consumption is provided. The decoder includes a first circuit and a second circuit for holding data. The second circuit includes a first transistor, a second transistor, and a third transistor. The first transistor and the second transistor include an oxide semiconductor in a channel formation region. The third transistor includes silicon in a channel formation region. A gate of the second transistor is electrically connected to one of a source and a drain of the first transistor and a gate of the third transistor is electrically connected to one of a source and a drain of the second transistor. The decoder is configured to provide or stop power supply to the semiconductor device depending on a packet ID of a header portion of the data and to perform data storing or restoring of data between the first circuit and the second circuit.

A decoder with reduced power consumption is provided. The decoder includes a first circuit and a second circuit for holding data. The second circuit includes a first transistor, a second transistor, and a third transistor. The first transistor and the second transistor include an oxide semiconductor in a channel formation region. The third transistor includes silicon in a channel formation region. A gate of the second transistor is electrically connected to one of a source and a drain of the first transistor and a gate of the third transistor is electrically connected to one of a source and a drain of the second transistor. The decoder is configured to provide or stop power supply to the semiconductor device depending on a packet ID of a header portion of the data and to perform data storing or restoring of data between the first circuit and the second circuit.