H04B1/00

Electronic device for selecting antenna to support designated radio communication among plurality of antennas
11539411 · 2022-12-27 · ·

An electronic device includes a first antenna configured to process a first radio frequency (RF) signal within a first frequency band; a second antenna spaced apart from the first antenna configured to process a second RF within a second frequency band different from the first frequency band; a first radio frequency front end (RFFE) and a second RFFE configured to process a third RF signal within a third frequency band different from the first frequency band and the second frequency band; a communication processor electrically connected to the first switch and the second switch; and a memory operatively coupled to the communication processor and configured to store performance information having, at least, a first value indicating an efficiency of the first antenna when performing a first radio communication, and a second value indicating an efficiency of the second antenna when performing the first radio communication. The memory is configured to store instructions that, when executed, cause the communication processor to transmit or receive a signal within at least one of the first frequency band, the second frequency band or the third frequency band, and select an antenna to support the first radio communication among the first antenna and the second antenna based on the performance information having the first value or the second value. The first RFFE and the second RFFE support the first radio communication within the third frequency band.

Apparatus and methods of packet retransmission between multi-link devices

Embodiments of the present invention provide apparatus and methods for multi-link operations that include retransmission of data using different wireless links. The following discussion describes one such exemplary electronic system or computer system that can be used as a platform for implementing embodiments of the present invention. The multi-link device can be a multi-link wireless access point or a multi-link wireless station, for example. The multi-link device can operate multiple transceivers simultaneously to perform multi-link operations including retransmission using different wireless links. For example, the multi-link device can transmit an encrypted MPDU using a first wireless link, and retransmit the MPDU using a second wireless link by setting a MAC header of the MPDU according to a MAC address of the second wireless link, to advantageously enhance the performance, reliability, and efficiency of the wireless network.

Dual processor system for reduced power application processing

A task processor has a low power connectivity processor and a high performance applications processor. Software processes have a component operative on a connectivity processor and a component operative on an applications processor. The low power connectivity processor is coupled to a low power front end for wireless packets and the high performance applications processor is coupled to a high performance front end. A power controller is coupled to the low power front end and enables the applications processor and high performance front end when wireless packets which require greater processing capacity are received, and removes power from the applications processor and high performance front end at other times.

Radio frequency circuit, antenna module, and communication device

A radio frequency circuit includes: a first filter having a first passband that corresponds to a portion of a frequency range of a first communication band allocated as a communication band for TDD; a second filter having a second passband that corresponds to a portion of the frequency range of the first communication band, the second passband being different from the first passband; a power amplifier that amplifies a transmission signal in the first communication band; a low-noise amplifier that amplifies a reception signal in the first communication band; and a switch that switches between connecting the first filter and the power amplifier and connecting the first filter and the low-noise amplifier, and switches between connecting the second filter and the power amplifier and connecting the second filter and the low-noise amplifier.

Supporting wideband inputs on RF receivers

Methods and devices to support multiple frequency bands in radio frequency (RF) circuits are shown. The described methods and devices are based on adjusting the effective width of a transistor in such circuits by selectively disposing matching transistors in parallel with the transistor. The presented devices and methods can be used in RF circuits including low noise amplifiers (LNAs), RF receiver front-ends or any other RF circuits where input matching to wideband inputs is required.

FREQUENCY RANGE CONVERSION
20220407548 · 2022-12-22 ·

Frequency ranges may be converted by an apparatus including a converter configured to shift an original frequency range of an input data signal to a target frequency range, an input band selective filter bank configured to route the input data signal through a bandpass filter of a selected subrange within the target frequency range, the input selective filter bank including a plurality of bandpass filters, each bandpass filter having a corresponding subrange within the target frequency range.

CURRENT MODE SIGNAL PATH OF AN INTEGRATED RADIO FREQUENCY PULSE GENERATOR

A current mode end-to-end signal path includes, a digital to analog converter (DAC), operating in current mode and an upconverting mixer, operating in current mode and operatively coupled to the DAC, wherein analog inputs and analog outputs of the DAC and the upconverting mixer are represented as currents, and the DAC generates a baseband signal.

SYSTEMS AND METHODS FOR MULTI-TRANSCEIVER RADIO FREQUENCY SIGNAL PROCESSING SYSTEMS

In one embodiment, a multi-transceiver RF signal processing system comprises: a controller; a DPD core and CFR engine; and a plurality of transceiver paths comprising at least a first transceiver path for a first frequency block, and a second transceiver path for a second frequency block. The first frequency block is adjacent to the second frequency block. Signal processing outputs a stream of digital RF based on wireless RF signals received into the first and second transceiver paths. Signal processing inputs a first stream of digital RF and outputs a first digital RF signal corresponding to the first frequency block to the first transceiver path, and outputs a second digital RF signal corresponding to the second frequency block to the second transceiver path for wireless transmission via the at least one antenna. The DPD core applies a distortion that covers the first and second frequency blocks.

Housing assembly and electronic devices

A housing assembly is provided according to the present disclosure. The housing assembly includes a dielectric substrate and a radio-wave transparent structure. The dielectric substrate has a first transmittance for a radio frequency signal in a preset frequency band. The radio-wave transparent structure is disposed on the dielectric substrate and at least partially covers the dielectric substrate. A region of the housing assembly corresponding to the radio-wave transparent structure has a second transmittance for the radio frequency signal in the preset frequency band, and the second transmittance is larger than the first transmittance. The housing assembly can be applied to an electronic device having an antenna module.

Low intermediate frequency transmitter

A radio frequency transmitter includes an upconverter that outputs in-phase (I) and quadrature (Q) signals, a digital timing offset circuit, first and second digital-to-analog converters (DACs), an analog timing offset removal circuit, first and second pulse shapers, and an adder. The digital timing offset circuit introduces a time offset between the I and Q signals. The first and second DACs output analog I and Q signals, respectively, and have first and second clock signals, respectively. The first and second clock signals have the same frequency and are offset relative to each other by the time offset. The analog timing offset removal circuit removes the time offset between the analog I and Q signals. The first and second pulse shapers receive the analog I and Q signals, respectively, and output pulse-shaped I and Q signals. The adder receives the pulse-shaped I and Q signals and outputs an intermediate frequency signal.