In an embodiment, a communications system includes a first transmitter including a digital beamforming baseband section configured to receive an input signal to be transmitted, the input signal at a baseband frequency, and a modulation section electrically coupled to the digital beamforming baseband section and a first antenna of a phased array antenna. The modulation section is configured to receive a local oscillator signal at a first local oscillator frequency and apply a baseband frequency shift to the input signal to generate a baseband frequency shifted input signal. The modulation section generates a modulated signal based on the input signal. The communication system includes a second transmitter included in a second IC chip of the plurality of IC chips electrically coupled to a second antenna and configured to provide a second modulated signal at the carrier frequency and a second LO leakage signal at a second local oscillator frequency.

A circuit comprising a receive block, a transmit block, and an antenna multiplexer. The antenna multiplexer includes an input port coupled to the transmit block, an output port coupled to the receive block, a common port for coupling to an antenna, and a receive filter coupled between the common port and the output port. The receive filter includes a first plurality of resonators coupled together in series between the common port and the output port including a compensation resonator coupled directly to the output port. A first angular range of a reflection coefficient of the antenna multiplexer over a transmission frequency band measured looking into the output port of the antenna multiplexer does not overlap with a second angular range of the conjugate of the reflection coefficient of the low noise amplifier over the transmission frequency band measured looking into an input of the low noise amplifier.

A typical Software Defined Radio (SDR) receiver for Binary Phase Shift Keying (BPSK) or higher order modulations accepts an incoming digital serial complex I/O channel sample stream and performs demodulation functions to recover the original baseband data stream that another source transmitted. Typically, for real-time high data rate (HDR)>5.0 Megabits per second (Mbps) operations, a SDR unit requires an Application Specific Integrated Circuit (ASIC) component or Field Programmable Gate Array (FPGA) component to perform the customized Digital Signal Processing (DSP) intensive processing functions in real-time. However, ASIC chips and FPGAs are typically relatively expensive to develop, purchase, and/or reconfigure. With the parallel multi-core algorithm method of this claim, one can now implement a real-time HDR (>5.0 Mbps) SDR Demodulator with only Commercial-Off-The-Shelf (COTS) software, a relatively inexpensive personal computer (PC) or server that contains a single multi-core General Purpose Processor (GPP), and especially without using ASICS or FPGAs.

A transmission method of simultaneously transmitting a first modulated signal and a second modulated signal at a common frequency performs precoding on both signals using a fixed precoding matrix and regularly changes the phase of at least one of the signals. One of signal generation processing in which phase change is performed and signal generation processing in which phase change is not performed is selectable, thereby improving general versatility in signal generation.

A communication circuit includes: a first radio frequency (RF) chain configured to output and/or receive a signal of a first frequency band through an antenna port; a second RF chain configured to output and/or receive a signal of a second frequency band through the antenna port; and a switch comprising a first terminal electrically connected to the first RF chain, a second terminal electrically connected to the second RF chain, and a third terminal electrically connected to a ground. The switch is configured to operate in a first operation mode or a second operation mode. In the first operation mode, the first terminal is electrically connected to the second terminal. In the second operation mode, the first terminal is electrically connected to the third terminal.

A communication circuit includes: a first radio frequency (RF) chain configured to output and/or receive a signal of a first frequency band through an antenna port; a second RF chain configured to output and/or receive a signal of a second frequency band through the antenna port; and a switch comprising a first terminal electrically connected to the first RF chain, a second terminal electrically connected to the second RF chain, and a third terminal electrically connected to a ground. The switch is configured to operate in a first operation mode or a second operation mode. In the first operation mode, the first terminal is electrically connected to the second terminal. In the second operation mode, the first terminal is electrically connected to the third terminal.

Systems and methods are provided for weapon system monitoring, historical usage analysis, and performance evaluation of a plurality of assets within a deployment location, where each asset of the plurality includes one or more sensors that record operational information of each asset and are used to produce at least one signal, including a server device running application software that uses the signal received from each asset to detect and store situational state data of each asset and performance level data of a party associated with each asset, and a machine learning system that uses the situational state data and the performance level data to determine an operational profile of the party.

This application discloses a wireless chip, a signal receiving method, and a wireless communications apparatus, and relates to the wireless communications field, to improve a signal strength of a received signal obstructed by an object, and select a wireless radio frequency channel corresponding to an antenna with good directivity. The wireless chip includes: a first wireless radio frequency channel, coupled to a first antenna; a second wireless radio frequency channel, coupled to a second antenna; and a wireless baseband, coupled to each of the first wireless radio frequency channel and the second wireless radio frequency channel, and configured to selectively receive a signal transmitted by a transmitting device, through at least one of the first wireless radio frequency channel or the second wireless radio frequency channel. The wireless chip can be a Bluetooth chip.

An interface circuit in a device, e.g., an access point, may perform link adaptation. During operation, the interface circuit may provide a wake-up frame, e.g., a LP-WUR packet, associated with a channel in a band of frequencies, where the wake-up frame is intended for a wake-up radio in a recipient device. Then, the interface circuit may receive, from the recipient device, feedback information associated with a second channel in a second band of frequencies, where the feedback information is associated with a main radio in the recipient device. Based at least in part on the feedback information, the interface circuit may estimate one or more communication metrics associated with the channel in the band of frequencies. Moreover, based at least in part on the one or more communication metrics, the interface circuit may determine a data rate for use in communication via the channel in the band of frequencies.

A receive extender in an integrated circuit may include: N phase-adjustment circuits that adjust phases of N receive signals from N receive antennas; and an N:1 demultiplexer that coherently combines the N receive signals into an output signal, which is provided to the transceiver chip. Moreover, a transmit extender in the integrated circuit may include: a 1:M multiplexer that coherently separates a transmit signal from the transceiver chip into M transmit signals, where N and M are non-zero integers that may be different; and M phase-adjustment circuits that adjust phases of the M transmit signals, which are provided to M transmit antennas. Note that the integrated circuit may be coupled to a second integrated circuit that phase shifts the output signal and the transmit signal based at least in part on the oscillator signal. Moreover, control signals between the integrated circuit and the second integrated circuit may be synchronized.