An integrated circuit (IC) device includes a substrate and a circuit region over the substrate. The circuit region includes at least one active region extending along a first direction, at least one gate region extending across the at least one active region and along a second direction transverse to the first direction, and at least one first input/output (IO) pattern configured to electrically couple the circuit region to external circuitry outside the circuit region. The at least one first IO pattern extends along a third direction oblique to both the first direction and the second direction.

Combinations of resistive change elements and resistive change element arrays thereof are described. Combinational resistive change elements and combinational resistive change element arrays thereof are described. Devices and methods for programming and accessing combinations of resistive change elements are described. Devices and methods for programming and accessing combinational resistive change elements are described.

A light-emitting diode display device is provided, including: a substrate, including a plurality of grooves, wherein an electrical contact is disposed in each of the grooves; and a plurality of light-emitting diodes, configured to be installed in the grooves, wherein each of the light-emitting diodes includes: a main body; and a first contact and a second contact, disposed on the main body, wherein the first contact and the second contact are respectively electrically connected to the substrate through the corresponding electrical contacts.

The invention provides an optoelectronic device comprising: (i) a porous dielectric scaffold material; and (ii) a semiconductor having a band gap of less than or equal to 3.0 eV, in contact with the scaffold material. Typically the semiconductor, which may be a perovskite, is disposed on the surface of the porous dielectric scaffold material, so that it is supported on the surfaces of pores within the scaffold. hi one embodiment, the optoelectronic device is an optoelectronic device which comprises a photoactive layer, wherein the photo-active layer comprises: (a) said porous dielectric scaffold material; (b) said semiconductor; and (c) a charge transporting material. The invention further provides the use, as a photoactive material in an optoelectronic device, of: (i) a porous dielectric scaffold material; and (ii) a semi-conductor having a band gap of less than or equal to 3.0 eV, in contact with the scaffold material. Further provided is the use of a layer comprising: (i) a porous dielectric scaffold material; and (ii) a semiconductor having a band gap of less than or equal to 3.0 eV, in contact with the scaffold material; as a photoactive layer in an optoelectronic device. In another aspect, the invention provides a photoactive layer for an optoelectronic device comprising (a) a porous dielectric scaffold material; (b) a semiconductor having a band gap of less than or equal to 3.0 eV, in contact with the scaffold material; and (c) a charge transporting material.

Three-dimensional (3D) semiconductor memory devices are provided. A 3D semiconductor memory device includes an electrode structure on a substrate. The electrode structure includes gate electrodes stacked on the substrate. The gate electrodes include electrode pad regions. The 3D semiconductor memory device includes a dummy vertical structure penetrating one of the electrode pad regions. The dummy vertical structure includes a dummy vertical semiconductor pattern and a contact pattern extending from a portion of the dummy vertical semiconductor pattern toward the substrate.

The present invention relates to a logic gate, comprising a metamaterial surface enhanced Raman scattering (MetaSERS) sensor, comprising (a) alphabetical metamaterials in the form of split ring resonators operating in the wavelength range of from 560 to 2200 nm; and (b) a guanine (G) and thymine (T)-rich oligonucleotide that can, upon presence of potassium cations (K.sup.+), fold into a G-quadruplex structure, and in presence of Hg.sup.2+, form a T-Hg.sup.2+-T hairpin complex that inhibits or disrupts the G-quadruplex structure formed in presence of K.sup.+, as well as methods of operating and using such a logic gate.

A light-emitting diode display device includes a light-emitting diode and a substrate. The light-emitting diode includes a central axis, and the substrate includes a first connecting portion and a second connecting portion. The central axis is extended through the first connecting portion. The second connecting portion is disposed outside of the first connecting portion and is spaced apart from the first connecting portion by a distance which is greater than zero, and the first connecting portion and the second connecting portion are respectively electrically connected to the light-emitting diode.

An image sensor of reduced chip size includes a semiconductor substrate having an active pixel region in which a plurality of active pixels are disposed and a power delivery region in which a pad is disposed. A plurality of first transparent electrode layers is disposed over the semiconductor substrate, respectively corresponding to the plurality of active pixels. A second transparent electrode layer is integrally formed across the active pixels. An organic photoelectric layer is disposed between the plurality of first transparent electrode layers and the second transparent electrode layer. An interconnection layer is located at a level that is the same as or higher than an upper surface of the pad with respect to an upper main surface of the semiconductor substrate. The interconnection layer extends from the pad to the second transparent electrode layer, and includes a connector electrically connecting the pad and the second transparent electrode layer.

The invention provides an optoelectronic device comprising: (i) a porous dielectric scaffold material; and (ii) a semiconductor having a band gap of less than or equal to 3.0 eV, in contact with the scaffold material. Typically the semiconductor, which may be a perovskite, is disposed on the surface of the porous dielectric scaffold material, so that it is supported on the surfaces of pores within the scaffold. In one embodiment, the optoelectronic device is an optoelectronic device which comprises a photoactive layer, wherein the photoactive layer comprises: (a) said porous dielectric scaffold material; (b) said semiconductor; and (c) a charge transporting material. The invention further provides the use, as a photoactive material in an optoelectronic device, of: (i) a porous dielectric scaffold material; and (ii) a semiconductor having a band gap of less than or equal to 3.0 eV, in contact with the scaffold material. Further provided is the use of a layer comprising: (i) a porous dielectric scaffold material; and (ii) a semiconductor having a band gap of less than or equal to 3.0 eV, in contact with the scaffold material; as a photoactive layer in an optoelectronic device. In another aspect, the invention provides a photoactive layer for an optoelectronic device comprising (a) a porous dielectric scaffold material; (b) a semiconductor having a band gap of less than or equal to 3.0 eV, in contact with the scaffold material; and (c) a charge transporting material.

A semiconductor apparatus includes a plurality of semiconductor devices. The semiconductor devices each include a ferroelectric layer, a conductive metal oxide layer, and a semiconductor layer, between two electrodes. The conductive metal oxide layer may be between the ferroelectric layer and the semiconductor layer. The ferroelectric layer, the conductive metal oxide layer, and the semiconductor layer may all include a metal oxide. The conductive metal oxide layer may include one or more materials selected from the group consisting of an indium oxide, a zinc oxide, a tin oxide, and any combination thereof.