Quantum bit (qubit) circuits, coupler circuit structures and coupling techniques are described. Such circuits and techniques may be used to provide multi-qubit circuits suitable for use in multichip modules (MCMs).

A method for generating a voltage waveform includes providing an optical signal, which comprises one or more sequences of optical pulses, distributing the optical pulses via optical waveguides to a plurality of optical-to-electrical converter units, using the optical-to-electrical converter units to convert the optical pulses into electric driving current pulses, generating voltage pulses by driving Josephson junctions with the electric driving current pulses.

Methods of forming superconducting integrated circuits are discussed. The method includes depositing a first superconducting metal layer to overlie at least a portion of a substrate, depositing a dielectric layer to cover a first region of the first superconducting metal layer, pattering the dielectric layer to expose at least a portion of the first region of the first superconducting metal layer and form an opening, and depositing a second superconducting metal layer at an ambient temperature that is less than a melting temperature of the second superconducting metal layer such that the second superconducting metal layer fills the opening and conductively contacts the at least a portion of the first region of the first superconducting metal layer.

An electronic component (10) is formed by a semiconductor component or a semiconductor-like structure having gate electrode assemblies (16, 18), for initializing the quantum mechanical state of a qubit.

An electronic component (10) is formed by a semiconductor component or a semiconductor-like structure having gate electrode assemblies (16, 18), for initializing the quantum mechanical state of a qubit.

Proposed is a phase shift introduction method, a structure, and a circuit device for eliminating or minimizing a risk associated with dissimilar materials, solving in principle a problem of mixing of a signal current and a control current that occurs due to DC connection of a phase shifter to a signal line, and stably and reliably providing a phase shift that is desired to be introduced without being adversely effected by noise generated by an ambient magnetic field, which is generated due to use of an external power supply. A structure according to the present invention includes a phase shifter 101 and a closed-loop circuit 103 that is directly used for computation or storage, and a quantum phase shift is generated in the closed-loop circuit 103 by using a fractional flux quantum captured by the phase shifter 101 that is DC-separated from the closed-loop circuit 103.

A system and method for mitigating flux trapping in a superconducting integrated circuit. A first metal layer is formed having a first critical temperature and a first device, and a flux directing layer is formed having a second critical temperature. The flux directing layer is positioned in communication with an aperture location, and the aperture location is spaced from the first device to isolate the first device from flux trapped in the aperture. The superconducting integrated circuit is cooled from a first temperature that is above both the first and second critical temperatures to a second temperature that is less than both the first and second critical temperatures by a cryogenic refrigerator. A relative temperature difference between the first and second critical temperatures causes the flux directing layer to direct flux away from the first device and trap flux at the aperture location.

A device includes: a first chip including a qubit; and a second chip bonded to the first chip, the second chip including a substrate including first and second opposing surfaces, the first surface facing the first chip, wherein the second chip includes a single layer of superconductor material on the first surface of the substrate, the single layer of superconductor material including a first circuit element. The second chip further includes a second layer on the second surface of the substrate, the second layer including a second circuit element. The second chip further includes a through connector that extends from the first surface of the substrate to the second surface of the substrate and electrically connects a portion of the single layer of superconducting material to the second circuit element.

One superconducting qubit device package disclosed herein includes a die having a first face and an opposing second face, and a package substrate having a first face and an opposing second face. The die includes a quantum device including a plurality of superconducting qubits and a plurality of resonators on the first face of the die, and a plurality of conductive pathways coupled between conductive contacts at the first face of the die and associated ones of the plurality of superconducting qubits or of the plurality of resonators. The second face of the package substrate also includes conductive contacts. The device package further includes first level interconnects disposed between the first face of the die and the second face of the package substrate, coupling the conductive contacts at the first face of the die with associated conductive contacts at the second face of the package substrate.

According to an embodiment of the present invention, a quantum processor includes a qubit chip. The qubit chip includes a substrate, and a plurality of qubits formed on a first surface of the substrate. The plurality of qubits are arranged in a pattern, wherein nearest-neighbor qubits in the pattern are connected. The quantum processor also includes a long-range connector configured to connect a first qubit of the plurality of qubits to a second qubit of the plurality of qubits, wherein the first and second qubits are separated by at least a third qubit in the pattern.