A method for fabricating a plurality of resistive random access memory (RRAM) cells includes providing a substrate including a memory medium arranged on an underlying layer; creating channel holes in the memory medium having a first critical dimension in a range from 1 nm to 20 nm; depositing switching material defining a filament of the RRAM cells in the channel holes; depositing a top electrode of the RRAM cells on the memory medium and the switching material; and separating adjacent ones of the RRAM cells by etching the top electrode and the memory medium between adjacent ones of the channel holes.

Technology prevents the peripheral devices from being taken over, to suppress the remote-attack on the network of electronic devices by applying the physical chip identification devices to the network. To realize this, a plurality of electronic appliances composing the network is divided into peripheral devices and stem servers that manage the registration information of the peripheral devices. The stem servers may be under the central control, whereas the peripheral devices hold the physical chip identification devices. By managing the peripheral devices in the level of a device like this, the security of the entire network is effectively improved.

Switch comprising at least one PCM portion that can be in a conducting or blocked state depending on the amorphous or crystalline state of the PCM that can change state when it is heated, in which the PCM portion is continuous and has an elongated shape such that an input and an output of the switch are connected to two ends of the PCM portion respectively that are separated from each other by a distance corresponding to the largest dimension of the PCM portion, and comprising a control device of the state of the switch capable of passing heating currents through the PCM portion, approximately perpendicular to the largest dimension of the PCM portion, from at least two input points separated from each other and separated from the ends of the PCM portion, to at least two output points separated from each other and separated from the ends of the PCM portion.

An embodiment phase change material switch may include a first phase change material element, a second phase change material element, a first conductor electrically connected to a first end of each of the first phase change material element and the second phase change material element such that the first conductor is configured as a first terminal of an electrical circuit having a parallel configuration, a second conductor electrically connected to a second end of each of the first phase change material element and the second phase change material element such that the second conductor is configured as a second terminal of the electrical circuit having the parallel configuration, and a heating device coupled to the first phase change material element and to the second phase change material element and configured to supply a heat pulse to the first phase change material element and to the second phase change material element.

An embodiment phase change material switch may include a first phase change material element, a second phase change material element, a first conductor electrically connected to a first end of each of the first phase change material element and the second phase change material element such that the first conductor is configured as a first terminal of an electrical circuit having a parallel configuration, a second conductor electrically connected to a second end of each of the first phase change material element and the second phase change material element such that the second conductor is configured as a second terminal of the electrical circuit having the parallel configuration, and a heating device coupled to the first phase change material element and to the second phase change material element and configured to supply a heat pulse to the first phase change material element and to the second phase change material element.

Structures and fabrication methods are disclosed wherein a switch and a capacitor are fabricated sharing the same process flow without the use of an extra mask. A first capacitor electrode is formed in parallel in the same metal layer using the same mask as a component of the PCM switch (e.g., a PCM switch heater electrode). A second capacitor electrode is formed in parallel in the same metal layer using the same mask as another component of the PCM switch (e.g., a PCM switch input pad or a PCM switch heat spreader). The capacitor insulator is formed in parallel in the same layer using the same mask as a PCM switch insulator (e.g., TBR or insulator between heat spreader and PCM layer).

Structures and fabrication methods are disclosed wherein a switch and a capacitor are fabricated sharing the same process flow without the use of an extra mask. A first capacitor electrode is formed in parallel in the same metal layer using the same mask as a component of the PCM switch (e.g., a PCM switch heater electrode). A second capacitor electrode is formed in parallel in the same metal layer using the same mask as another component of the PCM switch (e.g., a PCM switch input pad or a PCM switch heat spreader). The capacitor insulator is formed in parallel in the same layer using the same mask as a PCM switch insulator (e.g., TBR or insulator between heat spreader and PCM layer).

A device structure includes semiconductor devices located on a substrate; metal interconnect structures located in dielectric material layers overlying the semiconductor devices; and a non-Ohmic voltage-triggered switch including a first switch electrode that is electrically connected to one of the semiconductor devices through a subset of the metal interconnect structures, a second switch electrode, and a non-Ohmic switching material portion providing a non-Ohmic current-voltage characteristics and in contact with the first switch electrode and the second switch electrode. The non-Ohmic voltage-triggered switch may be used as an electrostatic discharge (ESD) switch.

A device structure includes semiconductor devices located on a substrate; metal interconnect structures located in dielectric material layers overlying the semiconductor devices; and a non-Ohmic voltage-triggered switch including a first switch electrode that is electrically connected to one of the semiconductor devices through a subset of the metal interconnect structures, a second switch electrode, and a non-Ohmic switching material portion providing a non-Ohmic current-voltage characteristics and in contact with the first switch electrode and the second switch electrode. The non-Ohmic voltage-triggered switch may be used as an electrostatic discharge (ESD) switch.

A device structure includes a parallel connection of capacitor-switch assemblies located over a substrate. The capacitor-switch assemblies include a first capacitor-switch assembly that includes a first series connection of a first capacitor and a first non-Ohmic switching device, which has a first threshold voltage and includes a first primary switch electrode, a first secondary switch electrode, and a first non-Ohmic switching material portion. The capacitor switch assemblies further include a second capacitor-switch assembly that includes a second series connection of a second capacitor and a second non-Ohmic switching device, which has a second threshold voltage and includes a second primary switch electrode, a second secondary switch electrode, and a second non-Ohmic switching material portion. The second threshold voltage is different from the first threshold voltage. The non-Ohmic switching devices may be conditionally turned on depending on a magnitude of applied voltage spikes.