A device structure includes a first series connection of a first phase change memory (PCM) switch and a second PCM switch. The first PCM switch includes a first heater line, a first PCM line, and a first contact electrode and a second contact electrode located on the first heater line. The second PCM switch includes a second heater line, a second PCM line, and a third contact electrode and a fourth contact electrode located on the second heater line. The second contact electrode is electrically connected to the third contact electrode. The fourth contact electrode is electrically grounded. One of the first contact electrode and the second contact electrode includes an radio-frequency (RF) signal input port. Another of the first contact electrode and the second contact electrode comprises an RF signal output port. The device structure may function as a combination PCM switch that decreases noise level during signal transmission.

A microelectronic device includes a boron-doped semiconductor material, a stack structure, slot structures, and cell pillar structures. The boron-doped semiconductor material is vertically above a lateral contact material. The stack structure is vertically above the boron-doped semiconductor material and includes blocks horizontally extending in parallel in a first direction and individually having tiers respectively including conductive material and insulative material vertically neighboring the conductive material. The slot structures vertically extend through the stack structure, the boron-doped semiconductor material, and the lateral contact material. The slot structures horizontally alternate with the blocks of the stack structure in a second direction orthogonal to the first direction. The cell pillar structures respectively include semiconductor material in contact with the lateral contact material and vertically extending through each of the lateral contact material, the boron-doped semiconductor material, and the stack structure. Related methods and memory devices are also described.

A microelectronic device includes a boron-doped semiconductor material, a stack structure, slot structures, and cell pillar structures. The boron-doped semiconductor material is vertically above a lateral contact material. The stack structure is vertically above the boron-doped semiconductor material and includes blocks horizontally extending in parallel in a first direction and individually having tiers respectively including conductive material and insulative material vertically neighboring the conductive material. The slot structures vertically extend through the stack structure, the boron-doped semiconductor material, and the lateral contact material. The slot structures horizontally alternate with the blocks of the stack structure in a second direction orthogonal to the first direction. The cell pillar structures respectively include semiconductor material in contact with the lateral contact material and vertically extending through each of the lateral contact material, the boron-doped semiconductor material, and the stack structure. Related methods and memory devices are also described.

A memory array includes hybrid memory cells, wherein each hybrid memory cell includes a transistor-type memory including a memory film extending on a gate electrode; a channel layer extending on the memory film; a first source/drain electrode extending on the channel layer; and a second source/drain electrode extending along the channel layer; and a resistive-type memory including a resistive memory layer, wherein the resistive memory layer extends between the second source/drain electrode and the channel layer.

The present disclosure configures a system component, such as a memory sub-system controller, to control light emitted memory (LEM) devices. The controller receives, from a host, a request to perform one or more memory operations on a set of data. The controller transmits, via one or more optical waveguides, a command to the set of LEM devices to process the set of data based on the one or more memory operations.

The present disclosure configures a system component, such as a memory sub-system controller, to control light emitted memory (LEM) devices. The controller receives, from a host, a request to perform one or more memory operations on a set of data. The controller transmits, via one or more optical waveguides, a command to the set of LEM devices to process the set of data based on the one or more memory operations.

Methods, devices, and systems for managing memory devices are provided. In one aspect, a memory system can include a memory device including memory cells, a memory controller coupled to the memory device, a power loss protection (PLP) circuit, and a discharge circuit coupled to an output of the PLP circuit. The discharge circuit includes one or more discharge paths configured to discharge at least one of the PLP circuit, the memory device, or the memory controller.

Methods, devices, and systems for managing memory devices are provided. In one aspect, a memory system can include a memory device including memory cells, a memory controller coupled to the memory device, a power loss protection (PLP) circuit, and a discharge circuit coupled to an output of the PLP circuit. The discharge circuit includes one or more discharge paths configured to discharge at least one of the PLP circuit, the memory device, or the memory controller.

Disclosed is a tunable inductor device having a substrate, a planar spiral conductor having a plurality of spaced-apart turns disposed over the substrate, and a phase change switch (PCS) having a patch of a phase change material (PCM) disposed over the substrate between and in contact with a pair of adjacent segments of the plurality of spaced-apart turns, wherein the patch of the PCM is electrically insulating in an amorphous state and electrically conductive in a crystalline state. The PCS further includes a thermal element disposed adjacent to the patch of PCM, wherein the thermal element is configured to maintain the patch of the PCM to within a first temperature range until the patch of the PCM converts to the amorphous state and maintain the patch of the PCM within a second temperature range until the first patch of PCM converts to the crystalline state.

A fabricating method of a resistive random access memory (RRAM) structure is disclosed. The method includes sequentially forming a bottom electrode, a resistive switching layer, and a top electrode. Specifically, the bottom electrode is a first cylinder, the resistive switching layer includes a second cylinder and a three-dimensional disk, and the top electrode is a third cylinder having a top base, a second bottom base, and a sidewall. Next, a spacer that surrounds the resistive switching layer is formed, and a conductive line that encapsulates and directly contacts the top base and sidewall of the third cylinder is subsequently formed. The RRAM structure features the first cylinder embedded within the second cylinder and the three-dimensional disk, and the second cylinder embedded within the third cylinder, enabling increased contact area and resistance difference