A micromechanical moisture-sensor device and a corresponding manufacturing method. The micromechanical moisture-sensor device is equipped with a first electrode device situated on the substrate; a second electrode device situated on the substrate; an electrical insulation device situated between the first electrode device and the second electrode device which includes a first area, which is in contact with the first electrode device and the second electrode device, and which includes a second area, which is exposed by the first electrode device and the second electrode device; a moisture-sensitive functional layer, which is applied across the first electrode device and the second electrode device and the second area of the insulation device lying between them in such a way that it forms a moisture-sensitive resistive electrical shunt at least in some areas between the first electrode device and the second electrode device.

The present invention provides for a structure comprising a plurality of emitters, wherein a first nozzle of a first emitter and a second nozzle of a second emitter emit in two directions that are not or essentially not in the same direction; wherein the walls of the nozzles and the emitters form a monolithic whole. The present invention also provides for a structure comprising an emitter with a sharpened end from which the emitter emits; wherein the emitters forms a monolithic whole. The present invention also provides for a fully integrated separation of proteins and small molecules on a silicon chip before the electrospray mass spectrometry analysis.

Chemical sensors include a functionalized electrode configured to change surface potential in the presence of an analyte. A piezoelectric element is connected to the functionalized electrode. A piezoresistive element is in contact with the piezoelectric element.

A photoelectric conversion element includes a ferroelectric layer; a first electrode and a second electrode provided on a surface or a surface layer portion of the ferroelectric layer; a common electrode provided on a surface or a surface layer portion of an opposite side to a side of the ferroelectric layer on which the first electrode and the second electrode are provided; and a pair of lead-out electrodes extracting electric power from the ferroelectric layer, in which the first electrode and the second electrode are arranged alternately in a predetermined direction.

The invention relates to a radiation source, comprising at least one semiconductor substrate, on which at least two field-effect transistors are formed, which each contain a gate electrode, a source contact, and a drain contact, which bound a channel, wherein the at least two field-effect transistors are arranged adjacent to each other on the substrate, wherein each field-effect transistor has exactly one gate electrode and at least one source contact and/or at least one drain contact is arranged between two adjacent gate electrodes, wherein a ballistic electron transport can be formed in the channel during operation of the radiation source. The invention further relates to a method for producing electromagnetic radiation having a vacuum wavelength between approximately 10 μm and approximately 1 mm.

A technique for improving the performance of a secondary battery is provided. A secondary battery according to an embodiment includes a first electrode, a second electrode, a first layer disposed on the first electrode, and including a first n-type oxide semiconductor, a second layer disposed on the first layer and including a second n-type oxide semiconductor material and a first insulating material, a third layer disposed on the second layer and including tantalum oxide, and a fourth layer disposed on the third layer and including a second insulating material.

Parallelism of memory access is improved without sacrificing operation margin. A storage unit includes a plurality of first lines extending in a first direction, a plurality of second lines extending in a second direction, and a plurality of memory cells each being inserted at a position at which any one of the plurality of first lines intersects any one of the plurality of second lines. A first driving unit supplies a first voltage having either a positive or a negative polarity to each of the plurality of first lines. A second driving unit supplies a second voltage having a polarity different from the first voltage to one of the plurality of second lines intersecting the plurality of first lines and supplies either a zero potential or a voltage having the same polarity as the first voltage to the remaining second lines intersecting the plurality of first lines.

Techniques facilitating frequency allocation in multi-qubit circuits are provided. In one example, a computer-implemented method comprises determining, by a device operatively coupled to a processor, an estimated fabrication yield associated with respective qubit chip configurations by conducting simulations of the respective qubit chip configurations at respective frequency offsets; and selecting, by the device, a qubit chip configuration from among the respective qubit chip configurations based on the estimated fabrication yield associated with the respective qubit chip configurations.

Apparatus, methods, and systems are disclosed for robust scalable topological quantum computing. Quantum dots are fabricated as van der Waals heterostructures, supporting localized topological phases and non-Abelian anyons (quasiparticles). Large bandgaps provide noise immunity. Three-dot structures include an intermediate quantum dot between two computational quantum dots. With the intermediate quantum dot in an OFF state, quasiparticles at the computational quantum dots can be isolated, with long lifetimes. Alternatively, the intermediate quantum dot can be controlled to decrease the quasiparticle tunneling barrier, enabling fast computing operations. A computationally universal suite of operations includes quasiparticle initialization, braiding, fusion, and readout of fused quasiparticle states, with, optionally, transport or tunable interactions—all topologically protected. Robust qubits can be operated without error correction. Quasilinear arrays of quantum dots or qubits can be scaled arbitrarily, up to resource limits, and large-scale topological quantum computers can be realized. Extensive two-dimensional arrays can also be used.

A quantum battery manufacturing method includes: providing a p-type semiconductor substrate including a first conductive substrate and a p-type semiconductor layer disposed on one surface of the first conductive substrate; providing an n-type semiconductor substrate including a second conductive substrate and an n-type semiconductor layer disposed on one surface of the second conductive substrate; and forming an electricity storage layer between the p-type semiconductor substrate and the n-type semiconductor substrate, and attaching two sides of the electricity storage layer respectively to the p-type semiconductor layer and the n-type semiconductor layer to form a quantum battery. The electricity storage layer is formed by heating a thermoplastic polymer to soften and become a liquid, mixing the liquid with energized core-shell particles, and coating a substrate with the mixture. Core-shell particles are disposed on a conductive substrate and irradiated with ultraviolet rays for energization.