Systems, methods, and devices are provided for a circuit for generating a pulse output having a controllable pulse width. Systems and methods may include a delay line having a plurality of stages. A delay per stage calculation circuit is configured to determine a per-stage delay of the delay line using a first clock input. A pulse generation circuit is configured to generate the pulse output using the delay line based on the per-stage delay using a second clock input, the second clock input having a lower frequency than the first clock input.

Systems, methods, and devices are provided for a circuit for generating a pulse output having a controllable pulse width. Systems and methods may include a delay line having a plurality of stages. A delay per stage calculation circuit is configured to determine a per-stage delay of the delay line using a first clock input. A pulse generation circuit is configured to generate the pulse output using the delay line based on the per-stage delay using a second clock input, the second clock input having a lower frequency than the first clock input.

A real-time clock device includes a resonator, a clock signal generation circuit, a time-counting circuit, a terminal, and a time-to-digital conversion circuit. The clock signal generation circuit outputs a time-counting clock signal based on an oscillation clock signal. The time-counting circuit generates time-counting data based on the time-counting clock signal. An external signal is input to the terminal. The time-to-digital conversion circuit measures a time difference between a transition timing of a first signal based on the external signal and a transition timing of a second signal based on the oscillation clock signal or the time-counting clock signal with a resolution higher than a time-counting resolution of the time-counting circuit, and obtains time difference information corresponding to the time difference.

A real-time clock device includes a resonator, a clock signal generation circuit, a time-counting circuit, a terminal, and a time-to-digital conversion circuit. The clock signal generation circuit outputs a time-counting clock signal based on an oscillation clock signal. The time-counting circuit generates time-counting data based on the time-counting clock signal. An external signal is input to the terminal. The time-to-digital conversion circuit measures a time difference between a transition timing of a first signal based on the external signal and a transition timing of a second signal based on the oscillation clock signal or the time-counting clock signal with a resolution higher than a time-counting resolution of the time-counting circuit, and obtains time difference information corresponding to the time difference.

Systems, methods, and devices are provided for a circuit for generating a pulse output having a controllable pulse width. Systems and methods may include a delay line having a plurality of stages. A delay per stage calculation circuit is configured to determine a per-stage delay of the delay line using a first clock input. A pulse generation circuit is configured to generate the pulse output using the delay line based on the per-stage delay using a second clock input, the second clock input having a lower frequency than the first clock input.

Systems, methods, and devices are provided for a circuit for generating a pulse output having a controllable pulse width. Systems and methods may include a delay line having a plurality of stages. A delay per stage calculation is circuit configured to determine a per-stage delay of the delay line using a first clock input. A pulse generation circuit is configured to generate the pulse output using the delay line based on the per-stage delay using a second clock input, the second clock input having a lower frequency than the first clock input.

A real-time clock module includes a switch circuit that is electrically coupled to a first node to which a first power supply voltage is applied and a second node to which a second power supply voltage is applied and switches between outputting the first power supply voltage and outputting the second power supply voltage, a power supply detection circuit that detects a voltage value of the first power supply voltage, a switch control circuit that controls the switching of the switch circuit based on an output of the power supply detection circuit, a constant voltage circuit that outputs a constant voltage signal based on the output of the switch circuit, and a current control circuit that controls a current supplied to the constant voltage circuit, in which, when where the switch control circuit switches the switch circuit, the current control circuit increases the current supplied to the constant voltage circuit.

A clock generator includes a hermetically sealed cavity and clock generation circuitry. A dipolar molecule in the hermetically sealed cavity has a quantum rotational state transition at a fixed frequency. The clock generation circuitry generates an output clock signal based on the fixed frequency of the dipolar molecule. The clock generation circuitry includes a detection circuit, a reference oscillator, and control circuitry. The detection circuit generates a first detection signal and a second detection signal representative of amplitude of signal at an output of the hermetically sealed cavity responsive to a first sweep signal and a second sweep signal input to the hermetically sealed cavity. The control circuitry sets a frequency of the reference oscillator based on a difference in time of identification of the fixed frequency of the dipolar molecule in the first detection signal and the second detection signal.

A clock generator includes a hermetically sealed cavity and clock generation circuitry. A dipolar molecule in the hermetically sealed cavity has a quantum rotational state transition at a fixed frequency. The clock generation circuitry generates an output clock signal based on the fixed frequency of the dipolar molecule. The clock generation circuitry includes a detection circuit, a reference oscillator, and control circuitry. The detection circuit generates a first detection signal and a second detection signal representative of amplitude of signal at an output of the hermetically sealed cavity responsive to a first sweep signal and a second sweep signal input to the hermetically sealed cavity. The control circuitry sets a frequency of the reference oscillator based on a difference in time of identification of the fixed frequency of the dipolar molecule in the first detection signal and the second detection signal.

A receiver may include a time-interleaved charge sampler comprising a charge sampler switch in series with a charge sampler capacitor. The receiver may also include a current buffer configured to drive the time-interleaved charge sampler.