A system, non-transitory computer readable medium, and method include entering redundant oscillators and a cascaded oscillator of a spoofing resistant system into an initialization state. All but one of the redundant oscillators are disciplined to a time-and-frequency external input into normal disciplining state with the remaining one of the redundant oscillators in a holdover state. When all but one of the redundant oscillators have reached the normal disciplining state, placing all but one of the redundant oscillators into the holdover state, disciplining the remaining one of the redundant oscillators to the time and frequency external input, and disciplining the cascaded oscillator to one of the all but one of the redundant oscillators now in the holdover state. When the remaining one of the redundant oscillators and the cascaded oscillator have reached the normal disciplining state, transitioning from an initialization stage to a steady state management stage.

In some implementations, a method of verifying operation of a sensor is provided. The method includes causing a sensor to obtain sensor data at a first time, wherein the sensor obtains the sensor data by emitting waves towards a detector. The method also includes determining that the detector has detected the waves at a second time. The method further includes receiving the sensor data from the sensor at a third time. The method further includes verifying operation of the sensor based on at least one of the first time, the second time, or the third time.

A control device (2) for controlling power supply to a continuous-rotation motor, of the horological, DC type, is arranged to generate electrical pulses with a lower supply voltage to drive the rotor. The number of pulses per time interval is a function of the load applied to the motor. A voltage divider is arranged to supply the lower supply voltage with a plurality of different values and thus the electrical pulses with a variable voltage. A logic circuit counts the numbers of electrical pulses in successive time periods; to periodically select a voltage value, from among a plurality of different values, as a function of a counted number of electrical pulses or of a succession of counted numbers of electrical pulses; and to control the voltage divider so that the latter supplies the lower supply voltage with the selected voltage value after the selection of this voltage value.

A dial including: a rotating body which is provided to be rotatable; and a dial main body which includes a covering section that covers a peripheral portion of the rotating body.

An electronic timepiece includes: a latch unit that latches and outputs specification data designating a specification in accordance with a latch signal; a signal output unit that outputs one of a plurality of driving signals including driving pulses at different periods based on the specification data output from the latch unit; a driving unit that drives a motor based on the driving signal output from the signal output unit; and a control unit that generates the latch signal so that the latch signal has at least an active level at a timing before generation of each driving pulse in the driving signal with a shortest period of the driving pulse among the plurality of driving signals.

An electronic timepiece includes: a latch unit that latches and outputs specification data designating a specification in accordance with a latch signal; a signal output unit that outputs one of a plurality of driving signals including driving pulses at different periods based on the specification data output from the latch unit; a driving unit that drives a motor based on the driving signal output from the signal output unit; and a control unit that generates the latch signal so that the latch signal has at least an active level at a timing before generation of each driving pulse in the driving signal with a shortest period of the driving pulse among the plurality of driving signals.

A satellite radio wave receiving device includes: a receiver that receives a satellite radio wave to identify a reception signal; and a processor that acquires primary date and time information from the identified reception signal and outputs a date and time notifying signal indicating date and time based on the primary date and time information to an outside of the satellite radio wave receiving device. The date and time notifying signal includes at least a timing notifying signal indicating a predetermined timing. The processor determines the predetermined timing without consideration of a timing of a second synchronization point which is a leading edge of every second in the date and time based on the primary date and time information, and outputs the timing notifying signal at the predetermined timing.

An oscillator includes a resonator, a clock signal generation circuit, a clock signal output terminal, an external signal input terminal, an interface circuit, and an interface terminal. The clock signal generation circuit oscillates the resonator to generate a clock signal. The clock signal output terminal outputs the clock signal. An external signal is input to the external signal input terminal. The interface circuit outputs time difference information obtained by measuring a time difference between a transition timing of a first signal based on the external signal input from the external signal input terminal and a transition timing of a second signal based on the clock signal, or frequency information obtained by measuring a frequency of a first clock signal, which is one of the clock signal and the external clock signal, based on a frequency of a second clock signal, which is the other of the clock signal and the external clock signal. The interface terminal is coupled to the interface circuit.

In some implementations, a method of verifying operation of a sensor is provided. The method includes causing a sensor to obtain sensor data at a first time, wherein the sensor obtains the sensor data by emitting waves towards a detector. The method also includes determining that the detector has detected the waves at a second time. The method further includes receiving the sensor data from the sensor at a third time. The method further includes verifying operation of the sensor based on at least one of the first time, the second time, or the third time.

The present invention relates to a satellite antenna integrated time-synchronization device for generating a time-synchronization signal from a satellite signal received from a satellite, which includes a case, a 1PPS synchronization module which is disposed in the case and is configured to generate at least a 1PPS signal from the satellite signal, and a signal processing means which is disposed in the case and is configured to generate an IRIG signal and communication data using the 1PPS signal input from the 1PPS synchronization module.