Integrated circuits may implement a filter to identify items in a data store that match a regular expression by sharing character data across lookups in the filter. The NFA states of the may be programmed responsive to a query that includes a regular expression. The NFA states may include a character decode stage that operates on one portion of character bits, while another portion of character bits is evaluated at a state detection stage that also evaluates an output value of the character decode stage.

Various embodiments comprise apparatuses such as those having a block of memory divided into sub-blocks that share a common data line. Each of the sub-blocks of the block of memory corresponds to a respective one of a number of segmented sources. Each of the segmented sources is electrically isolated from the other segmented sources of the block of memory. Additional apparatuses and methods of operation are described.

Disclosed herein are an image processor, an ultrasonic imaging device, and an image processing method. The image processor includes a signal input unit configured to receive an input signal on a channel, a weighting coefficient database configured to store a weighting coefficient wherein the weighting coefficient is part of a weighting coefficient subgroup, and a processor configured to select the weighting coefficient subgroup from the weighting coefficient database, and convert the input signal by selecting and using the weighting coefficient from the weighting coefficient subgroup.

Various embodiments comprise apparatuses such as those having a block of memory divided into sub-blocks that share a common data line. Each of the sub-blocks of the block of memory corresponds to a respective one of a number of segmented sources. Each of the segmented sources is electrically isolated from the other segmented sources of the block of memory. Additional apparatuses and methods of operation are described.

Various embodiments comprise apparatuses such as those having a block of memory divided into sub-blocks that share a common data line. Each of the sub-blocks of the block of memory corresponds to a respective one of a number of segmented sources. Each of the segmented sources is electrically isolated from the other segmented sources of the block of memory. Additional apparatuses and methods of operation are described.

Various embodiments comprise apparatuses such as those having a block of memory divided into sub-blocks that share a common data line. Each of the sub-blocks of the block of memory corresponds to a respective one of a number of segmented sources. Each of the segmented sources is electrically isolated from the other segmented sources of the block of memory. Additional apparatuses and methods of operation are described.

Aspects of the disclosure provide an apparatus that includes a key generator, a first memory, a second memory, and a controller. The key generator is configured to generate a first search key, and one or more second search keys in response to a pattern. The first memory is configured to compare the first search key to a plurality of entries populated in the first memory, and determine an index of a matching entry to the first search key. The second memory is configured to respectively retrieve one or more exact match indexes of the one or more second search keys from one or more exact match pattern groups populated in the second memory. The controller is configured to select a search result for the pattern from among the index output from the first memory and the one or more exact match indexes output from the second memory.

Various embodiments comprise apparatuses such as those having a block of memory divided into sub-blocks that share a common data line. Each of the sub-blocks of the block of memory corresponds to a respective one of a number of segmented sources. Each of the segmented sources is electrically isolated from the other segmented sources of the block of memory. Additional apparatuses and methods of operation are described.