Systems and methods are provided to compensate image data for display on a curved display. A pixel uniformity compensation factor may be applied based on a pixel uniformity compensation factor map that is calibrated to the display panel while the display panel has a flat shape, and a panel curvature compensation factor may be applied when the image content is to be displayed while the display panel has a curved shape. The panel curvature compensation factor may be based on a panel curvature compensation factor map that is calibrated to the display panel after the display panel is bent from the flat shape to the curved shape.

A control method of a power supply path includes detecting a plug-in state of a first connector through a configuration channel pin of the first connector; acquiring a plurality of rated voltages of a first power adaptor externally connected to the first connector and a rated current corresponding to each of the rated voltages; detecting a plug-in state of a second connector through a direct-current (DC) input pin of the second connector; acquiring a power quota of a second power adaptor externally connected to the second connector; selecting, from the plurality of rated voltages, the largest one that is not greater than an operating voltage, as a selected rated voltage; calculating a power quota of the selected rated voltage; and controlling a switching circuit to couple a power circuit to a power pin of one of the first and second connectors according to the two power quotas.

A light emitting display device can include a display panel configured to display an image, a driver configured to drive the display panel, and a power supply configured to supply a high-level voltage to a first power line of the display panel. Also, the power supply includes a voltage controller configured to receive, from the driver, a vertical synchronization signal and current amount information of the high-level voltage for driving of the display panel, and boost the high-level voltage to be supplied to the display panel during a vertical blank period, based on the vertical synchronization signal and the current amount information of the high-level voltage.

Provided are a display including a very-small light-emitting diode (LED) and a method of manufacturing the same. The display includes a panel in which a first signal line and a second signal line are disposed in a lattice form, an LED module including an electrode assembly having a first electrode connected to the first signal line and the second signal line and a second electrode connected to a ground, and a plurality of very-small LEDs connected to the first electrode and the second electrode, and two or more switches which connect the first signal line and the second signal line to the first electrode, wherein the second electrode is connected to a common electrode formed on the panel, at least one other LED module is grounded to the common electrode, and the two or more switches selectively provide a current supplied through the first signal line to the first electrode on the basis of a signal of the first signal line and a signal of the second signal line.

The present invention overcomes image defects such as the brightness inclination or smears by reducing the line resistance of a power source bus line which supplies electricity to organic EL elements. A plurality of pixels which are arranged in a matrix array is connected to power source lines, and the plurality of power source lines are connected to a power source bus line. Both ends of the power source bus line are connected to a power source part via a FPC. By supplying electricity to both ends of the power source bus line from the power source part, the line resistance of the power source bus line can be reduced.

According to one embodiment, a display device includes a display area where a plurality of pixels are arrayed, a first drive circuit arranged adjacent to the display area in a first direction, the first drive circuit configured to supply a drive signal to a gate electrode included in each of switching elements, and a memory power line extending in a second direction intersecting the first direction in the display area and configured to supply a potential to a memories. An outer edge of the display area is defined by outermost edges of the pixels located on an outermost side in the display area. A first distance from the first drive circuit to the outer edge is shorter than a second distance from the first drive circuit to the memory power line.

A pixel includes a first light source including at least one first light emitting element between a first split electrode and a second power supply; a second light source unit including at least one second light emitting element between a second split electrode and the second power supply; a driving-current generator including a first transistor between a first power supply and the first and second light source units and generating a driving current corresponding to a first data signal; a first switching unit including a first switching element between the driving-current generator and the first light source; and a second switching unit including a second switching element between the driving-current generator and the second light source unit and controlling an electrical connection between the first and second light source units in response to a second data signal.

Described is a CMOS power plane including interleaving contact areas, alternating V.sub.led and V.sub.cat contact areas, on at least two long sides of the μLED display area. By this way, V.sub.led and cathode current are injected uniformly along the four sides of the μLED display panel. A large cathode current distribution ring on V.sub.led and V.sub.cat circuits is used to distribute the current along the four sides of the panel. The current distribution ring surrounds a pixel die area. An insulated area may be included on the cathode current redistribution ring adjacent one of the of μbumps.

Described is a CMOS power plane including interleaving contact areas, alternating V.sub.led and V.sub.cat contact areas, on at least two long sides of the μLED display area. By this way, V.sub.led and cathode current are injected uniformly along the four sides of the μLED display panel. A large cathode current distribution ring on V.sub.led and V.sub.cat circuits is used to distribute the current along the four sides of the panel. The current distribution ring surrounds a pixel die area. An insulated area may be included on the cathode current redistribution ring adjacent one of the of μbumps.

A control method for the an electrochromic device includes: determining whether a current transmittance of the electrochromic device reaches a preset transmittance; when determining that the current transmittance does not reach the preset transmittance, controlling an external power supply to perform a first mode charging and discharging on the electrochromic device until the current transmittance reaches the preset transmittance; when determining that the current transmittance reaches the preset transmittance, suspending the charging and discharging, and continuously monitoring whether a current open circuit potential of the electrochromic device is within a preset open circuit potential threshold range; and if the current open circuit potential is not within the preset open circuit potential threshold range, controlling the external power supply to perform a second mode charging and discharging on the electrochromic device to enable the current open circuit potential to be continuously within the preset open circuit potential threshold range.