Patent classifications
G11B13/00
Device and method to generate and apply gravito-magnetic energy
A device and method of producing electrical energy by gravitomagnetic induction utilizing Nano-features fabricated on an object surface of an object is presented. The Nano-features may include Nano-bumps and Nano-pits. One device version includes a computer hard disk, a piezoelectric glide head, and/or a GMR read head, a prior art hard drive module electronics. By spinning the nano-features disk one produces an associated magnetic force utilizing a GMR read head for producing power by the presence or the absence of matter on an object that is in motion relative to the GMR read head. A computer system generated by the alternate computer system generates gravito-magnetic energy to power itself and/or other electrical or electronic devices, and/or, detects patterns of asperities or bump on a hard disk to generate binary value private keys applicable in asymmetric cryptography, such as public key cryptography.
Vision system for laboratory workflows
A depth-sensitive system for monitoring for and detecting a predefined condition at a specific location within a visually monitored portion of an area. Plural depth-sensitive cameras are oriented with respect to the area whereby each camera has a field of view within the area that at least partially overlaps with the field of view of another of the plural cameras. The combined field of view encompasses all portions of interest of the area. A system for providing a notification of the visual detection of a predefined condition at a particular location or set of locations within an area of interest is provided, as is a system for generating a visual representation of human activity at one or more specific locations within an area of interest.
Semiconductor device comprising memory cell
To provide a memory cell for storing multilevel data that is less likely to be affected by variations in characteristics of transistors and that is capable of easily writing multilevel data in a short time and accurately reading it out. In writing, a current corresponding to multilevel data is supplied to the transistor in the memory cell and stored as the gate-drain voltage of the transistor in the memory cell. In reading, a current is supplied to the transistor in the transistor with the stored gate-drain voltage, and the multilevel data is obtained from the voltage supplied to generate a current that is equal to the current.
Semiconductor device comprising memory cell
To provide a memory cell for storing multilevel data that is less likely to be affected by variations in characteristics of transistors and that is capable of easily writing multilevel data in a short time and accurately reading it out. In writing, a current corresponding to multilevel data is supplied to the transistor in the memory cell and stored as the gate-drain voltage of the transistor in the memory cell. In reading, a current is supplied to the transistor in the transistor with the stored gate-drain voltage, and the multilevel data is obtained from the voltage supplied to generate a current that is equal to the current.
SEMICONDUCTOR DEVICE
To provide a memory cell for storing multilevel data that is less likely to be affected by variations in characteristics of transistors and that is capable of easily writing multilevel data in a short time and accurately reading it out. In writing, a current corresponding to multilevel data is supplied to the transistor in the memory cell and stored as the gate-drain voltage of the transistor in the memory cell. In reading, a current is supplied to the transistor in the transistor with the stored gate-drain voltage, and the multilevel data is obtained from the voltage supplied to generate a current that is equal to the current.
Semiconductor memory device
To provide a memory cell for storing multilevel data that is less likely to be affected by variations in characteristics of transistors and that is capable of easily writing multilevel data in a short time and accurately reading it out. In writing, a current corresponding to multilevel data is supplied to the transistor in the memory cell and stored as the gate-drain voltage of the transistor in the memory cell. In reading, a current is supplied to the transistor in the transistor with the stored gate-drain voltage, and the multilevel data is obtained from the voltage supplied to generate a current that is equal to the current.