A semiconductor module includes a resin case housing a semiconductor element; an insulating layer extending outward from the resin case; and a first external connection terminal extending outward from the resin case, arranged above the insulating layer so as to face the insulting layer, the first external connection terminal having a non-contact portion that is not in contact with the insulating layer in a thickness direction of the insulating layer at a position overlapping the insulating layer in a plan view.

A multilayer capacitor includes a capacitor body including an active region having dielectric layers and internal electrodes alternately stacked therein, the capacitor body including upper and lower covers disposed on upper and lower surfaces of the active region, respectively; and an external electrode disposed on an external surface of the capacitor body. In one of the upper and lower covers, a portion thereof between a boundary surface of the active region and a boundary surface of the capacitor body is divided into a first cover region adjacent to the active region and a second cover region adjacent to the boundary surface of the capacitor body, and the first cover region includes grains having a core-shell structure doped with Sn. The first cover region includes 20% or more of Sn-doped core-shell structure grains, compared to the total of grains in the first cover region.

A multilayer capacitor includes a capacitor body including an active region having dielectric layers and internal electrodes alternately stacked therein, the capacitor body including upper and lower covers disposed on upper and lower surfaces of the active region, respectively; and an external electrode disposed on an external surface of the capacitor body. In one of the upper and lower covers, a portion thereof between a boundary surface of the active region and a boundary surface of the capacitor body is divided into a first cover region adjacent to the active region and a second cover region adjacent to the boundary surface of the capacitor body, and the first cover region includes grains having a core-shell structure doped with Sn. The first cover region includes 20% or more of Sn-doped core-shell structure grains, compared to the total of grains in the first cover region.

Embodiments include a method of stress testing an electronics package with components that include a visual indicator. In an embodiment, the method comprises populating a plurality of components on an electronics package. In an embodiment, the plurality of components each comprise a visual indicator that is responsive to heat. In an embodiment, the method further comprises stress testing the electronics package and categorizing the plurality of components based on the visual indicators. In an embodiment, the method may further comprise modifying the plurality of components.

A method of determining a lifetime parameter of a capacitor in a failsafe device includes measuring an amount of energy required to return the failsafe device to a failsafe position, measuring an effective capacitance of the capacitor, and comparing the amount of energy to the effective capacitance to determine the lifetime parameter of the capacitor.

A multilayer ceramic capacitor includes a multilayer body including dielectric layers, first and second internal electrode layers on the dielectric layers and respectively exposed at first and second end surfaces, and first and second external electrodes respectively located on first and second end surfaces of the multilayer body. The multilayer body includes an inner layer portion, and first and second main-surface-side outer layer portions each including a protective structure made of metal and not overlapping the inner layer portion when the multilayer ceramic capacitor is seen from above. The protective structure is not in contact with first and second end surfaces.

A multilayer ceramic capacitor includes a multilayer body including dielectric layers, first and second internal electrode layers on the dielectric layers and respectively exposed at first and second end surfaces, and first and second external electrodes respectively located on first and second end surfaces of the multilayer body. The multilayer body includes an inner layer portion, and first and second main-surface-side outer layer portions each including a protective structure made of metal and not overlapping the inner layer portion when the multilayer ceramic capacitor is seen from above. The protective structure is not in contact with first and second end surfaces.

An electronic modulating device is provided. The electronic modulating device includes a first substrate, a second substrate, at least one working unit and at least one adjustment structure. The second substrate is disposed opposite to the first substrate. The at least one working unit includes a first cell gap and is disposed between the first substrate and the second substrate. The at least one working unit includes a modulating material. The at least one adjustment structure includes a second cell gap and is disposed between the first substrate and the second substrate. The second cell gap is greater than the first cell gap.

An electronic modulating device is provided. The electronic modulating device includes a first substrate, a second substrate, at least one working unit and at least one adjustment structure. The second substrate is disposed opposite to the first substrate. The at least one working unit includes a first cell gap and is disposed between the first substrate and the second substrate. The at least one working unit includes a modulating material. The at least one adjustment structure includes a second cell gap and is disposed between the first substrate and the second substrate. The second cell gap is greater than the first cell gap.

A micro-isolator is described. The micro-isolator may include a first isolator element, a second isolator element, and a first dielectric material separating the first isolator element from the second isolator element. A second dielectric material may completely or partly encapsulate the second isolator element, or may be present at outer corners of the second isolator element. The second dielectric material may have a larger bandgap than the first dielectric material, and its configuration may reduce electrostatic charge injection into the first dielectric material. The micro-isolator may be formed using microfabrication techniques.