Methods, systems and apparatus for implementing a tunable qubit coupler. In one aspect, a device includes: a first data qubit, a second data qubit, and a third qubit that is a tunable qubit coupler arranged to couple to the first data qubit and to couple to the second data qubit such that, during operation of the device, the tunable qubit coupler allows tunable coupling between the first data qubit and the second data qubit.

A configuration and a method of constructing a high-temperature superconductor tape including a plurality superconducting filaments sandwiched between a substrate and an overlayer, and having a compliant material extending between the substrate and the overlayer and isolating each superconducting filament.

An alternating current loss measuring apparatus for superconductors includes a superconductor specimen, a magnetic field applying coil, a radiation shield, a vacuum vessel, first cooling means, and second cooling means. The first cooling means or the second cooling means is provided with a temperature regulating mechanism. The magnetic field applying means and the radiation shield are set to be a first cooling part, whereas the superconductor specimen is set to be a second cooling part, and the first cooling part and the second cooling part are cooled by first and second cooling means, respectively. A high thermal resistance member is disposed between the superconductor specimen and the second cooling means, and temperature measuring means are disposed at at least two positions on the high thermal resistance member. The alternating current loss of a superconductor under an external magnetic field can be measured at each of different temperatures.

Various techniques and apparatus permit fabrication of superconductive circuits. A niobium/aluminum oxide/niobium trilayer may be formed and individual Josephson Junctions (JJs) formed. A protective cap may protect a JJ during fabrication. A hybrid dielectric may be formed. A superconductive integrated circuit may be formed using a subtractive patterning and/or additive patterning. A superconducting metal layer may be deposited by electroplating and/or polished by chemical-mechanical planarization. The thickness of an inner layer dielectric may be controlled by a deposition process. A substrate may include a base of silicon and top layer including aluminum oxide. Depositing of superconducting metal layer may be stopped or paused to allow cooling before completion. Multiple layers may be aligned by patterning an alignment marker in a superconducting metal layer.

Techniques for facilitating reduced thermal resistance attenuator on high-thermal conductivity substrates for quantum applications are provided. A device can comprise a substrate that provides a thermal conductivity level that is more than a defined thermal conductivity level. The device can also comprise one or more grooved transmission lines formed in the substrate. The one or more grooved transmission lines can comprise a powder substance. Further, the device can comprise one or more copper heat sinks formed in the substrate. The one or more copper heat sinks can provide a ground connection. Further, the one or more copper heat sinks can be formed adjacent to the one or more grooved transmission lines.

A first aspect provides a topological quantum computing device comprising a network of semiconductor-superconductor nanowires, each nanowire comprising a length of semiconductor formed over a substrate and a coating of superconductor formed over at least part of the semiconductor; wherein at least some of the nanowires further comprise a coating of ferromagnetic insulator disposed over at least part of the semiconductor. A second aspect provides a method of fabricating a quantum or spintronic device comprising a heterostructure of semiconductor and ferromagnetic insulator, by: forming a portion of the semiconductor over a substrate in a first vacuum chamber, and growing a coating of the ferromagnetic insulator on the semiconductor by epitaxy in a second vacuum chamber connected to the first vacuum chamber by a vacuum tunnel, wherein the semiconductor comprises InAs and the ferromagnetic insulator comprises EuS.

The present invention relates to a one-electrode cell and series of two or more cells as a device at temperatures from below to above room temperature comprising a very high permittivity ferroelectric.

In a device constituted by one or more ferroelectricity-induced superconductor cells, the cells do not have to be in physical contact with one another; one terminal can be connected to a first cell and the other connected to a third cell without physical contact between any of the three cells. With the spontaneous and dynamic alignment of the dipoles of the ferroelectric, a potential difference is induced in different points of the surface of the cell, cells or device and a current can be harvested by conductor-terminals.

The present invention can be used for contactless charging of energy storage devices and as a part of several components or products.

A superconducting flexible interconnecting cable connector for supercomputing systems is provided. The cable connector includes a base with a recessed area defined therein to receive superconducting flexible interconnecting cables and superconducting connecting chips to electrically connect the superconducting flexible interconnecting cables to each other. A cover is provided to cover the superconducting flexible interconnecting cables and the superconducting connecting chips when the cover is in a closed position. A compression device compresses the superconducting connecting chips together to secure the superconducting flexible interconnecting cables and the superconducting connecting chips inside the recessed area of the base when the cover is in the closed position.

The present invention relates to a plurality of phononic devices and a method of manufacturing thereof. In one embodiment, highly sensitive superconducting cryogenic detectors integrate phononic crystals into their architecture. The phononic structures are designed to reduce the loss of athermal phonons, resulting in lower noise and higher sensitivity detectors. This fabrication process increases the qp generation recombination rate, thus, reducing the noise equivalent power (NEP) without sacrificing the scalability. A plurality of phononic devices, such as a kinetic inductance detector (KID), a transition edge sensor (TES) bolometer, and quarterwave backshort, can be manufactured according to the methods of the present invention.

A modular superconducting quantum processor includes a first superconducting chip including a first plurality of qubits each having substantially a first resonance frequency and a second plurality of qubits each having substantially a second resonance frequency, the first resonance frequency being different from the second resonance frequency, and a second superconducting chip including a third plurality of qubits each having substantially the first resonance frequency and a fourth plurality of qubits each having substantially the second resonance frequency. The quantum processor further includes an interposer chip connected to the first superconducting chip and to the second superconducting chip. The interposer chip has interposer coupler elements configured to couple the second plurality of qubits to the fourth plurality of qubits.