A terahertz element of an aspect of the present disclosure includes a semiconductor substrate, first and second conductive layers, and an active element. The first and second conductive layers are on the substrate and mutually insulated. The active element is on the substrate and electrically connected to the first and second conductive layers. The first conductive layer includes a first antenna part extending along a first direction, a first capacitor part offset from the active element in a second direction as viewed in a thickness direction of the substrate, and a first conductive part connected to the first capacitor part. The second direction is perpendicular to the thickness direction and first direction. The second conductive layer includes a second capacitor part, stacked over and insulated from the first capacitor part. The substrate includes a part exposed from the first and second capacitor parts. The first conductive part has a portion spaced apart from the first antenna part in the second direction with the exposed part therebetween as viewed in the thickness direction.

It is an object of the present invention to provide a buffer circuit that reduces a reverse voltage applied to transistors being a complementary pair during turn-on and turn-off. A buffer circuit is a buffer circuit that turns on and turns off a switching element and includes a drive-side element that has an end connected to a base of a drive transistor and a sink-side element that has an end connected to a base of a sink transistor. The drive-side element and the sink-side element are respectively a drive-side diode and a sink-side diode, or a drive-side capacitor and a sink-side capacitor.

An apparatus comprises a digitally controlled circuit having a variable capacitance and a controller configured to adjust a magnitude of the variable capacitance of the digitally controlled circuit. The digitally controlled circuit comprises a plurality of gain elements, the plurality of gain elements comprising one or more positive voltage-to-frequency gain elements and one or more negative voltage-to-frequency gain elements. The controller is configured to adjust the magnitude of the capacitance by adjusting the gain provided by respective ones of the gain elements in an alternating sequence of the positive voltage-to-frequency gain elements and the negative voltage-to-frequency gain elements.

An apparatus comprises a digitally controlled circuit having a variable capacitance and a controller configured to adjust a magnitude of the variable capacitance of the digitally controlled circuit. The digitally controlled circuit comprises a plurality of gain elements, the plurality of gain elements comprising one or more positive voltage-to-frequency gain elements and one or more negative voltage-to-frequency gain elements. The controller is configured to adjust the magnitude of the capacitance by adjusting the gain provided by respective ones of the gain elements in an alternating sequence of the positive voltage-to-frequency gain elements and the negative voltage-to-frequency gain elements.

A stress compensated oscillator circuitry comprises a sensor arrangement for providing a sensor output signal S.sub.Sensor, wherein the sensor output signal S.sub.Sensor is based on an instantaneous stress or strain component a in the semiconductor substrate, a processing arrangement for processing the sensor output signal S.sub.Sensor and providing a control signal S.sub.Control depending on the instantaneous stress or strain component σ in the semiconductor substrate, and an oscillator arrangement for providing an oscillator output signal S.sub.osc having an oscillator frequency f.sub.osc based on the control signal S.sub.Control, wherein the control signal S.sub.Control controls the oscillator output signal S.sub.osc, and wherein the control signal S.sub.Control reduces the influence of the instantaneous stress or strain component σ in the semiconductor substrate onto the oscillator output signal S.sub.osc, so that the oscillator circuitry provides a stress compensated oscillator output signal.

A gate driver circuit comprises a gate-driver assembly, a transformer, first and second circuit voltage outputs, first and second switching devices, and a controller. The gate-driver assembly comprises a first and second voltage inputs and a first and second voltage outputs coupled to a primary winding of the transformer. The first and second switching devices are coupled to the secondary winding and respectively coupled to the first and second circuit voltage outputs. The controller is configured to cause the first circuit voltage output to supply a positive output voltage by supplying a higher first input voltage to the first voltage input than to the second voltage input and is also configured to cause the first circuit voltage output to supply a negative output voltage by supplying a higher second input voltage to the second voltage input than to the first voltage input.

Provided is an electronic circuit capable of preventing a switching device from breakage when a short-circuit occurs. When a gate control signal CG1 is inverted from an L level to an H level, a first switching circuit 32 selects a first input terminal a, and connects an output terminal d to the first input terminal a, whereby turning on a MOSFET 21. When a predetermined time Tx elapses after the output terminal d of the first switching circuit 32 is connected to the first input terminal a, a second switching circuit 34 selects a first input terminal e, and connects an output terminal g to the first input terminal e. Furthermore, immediately after the connection, the first switching circuit 32 selects a second input terminal b, and connects the output terminal d to the second input terminal b. Consequently, immediately after the MOSFET 21 is turned on, a gate resistor is switched from a first gate resistor 33 having a small resistance value to a second gate resistor 35 having a large resistance value.

Provided is a semiconductor device exemplified by an inverter circuit and a shift register circuit, which is characterized by a reduced number of transistors. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a second wiring. One of a source and a drain of the second transistor is electrically connected to the first wiring, a gate of the second transistor is electrically connected to a gate of the first transistor, and the other of the source and the drain of the second transistor is electrically connected to one electrode of the capacitor, while the other electrode of the capacitor is electrically connected to a third wiring. The first and second transistors have the same conductivity type.

Provided is a semiconductor device exemplified by an inverter circuit and a shift register circuit, which is characterized by a reduced number of transistors. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a second wiring. One of a source and a drain of the second transistor is electrically connected to the first wiring, a gate of the second transistor is electrically connected to a gate of the first transistor, and the other of the source and the drain of the second transistor is electrically connected to one electrode of the capacitor, while the other electrode of the capacitor is electrically connected to a third wiring. The first and second transistors have the same conductivity type.

A control circuit for turning on a power semiconductor switch comprises an input which is configured to receive a signal that characterizes the switch-on behavior of the power semiconductor switch, a variable current source which is configured to supply a current with a variable level to a control input of the power semiconductor switch in order to switch on the power semiconductor switch, wherein the control circuit is configured to control the variable current source in a closed control loop in response to the signal that characterizes the switch-on behavior of the power semiconductor switch.