Patent classifications
H03D3/00
Local oscillator switching control for a very low intermediate frequency receiver
A very low intermediate frequency receiver and methods for controlling the same. One method includes providing, using a local oscillator, a first intermediate frequency, detecting, using an interferer detector, an adjacent or alternate channel interference signal and an image of the adjacent or adjacent channel interference signal causing interference with a desired signal, and determining, using an electronic processor, whether the desired signal is an analog signal. In response to determining that the desired signal is an analog signal, the method includes controlling, using the electronic processor, the local oscillator to provide a second intermediate frequency. In response to determining that the desired signal is not an analog signal, the method includes determining, using the electronic processor, a switching condition based on the desired signal, and controlling, using the electronic processor, the local oscillator to provide the second intermediate frequency in response to determining the switching condition.
System and method for cancelling strong signals from combined weak and strong signals in communications systems
A receiver for cancelling strong signals from combined weak and strong signals includes: a first circuitry for inputting a weak and strong signal as an input; a parametric cancellation circuit for inputting a representation of the strong signal and an output of the first circuitry to produce a cancellation signal; a second circuitry electrically coupled to the parametric cancellation circuit for inputting the cancellation signal to produce a modulated output; a demodulator electronically coupled to the second circuitry for demodulating the modulated output to produce a demodulated output and an error signal, where the demodulated output is the data contained in the weak signal; and an adaptation logic circuit for inputting the representation of the strong signal, the demodulated output and the error signal to adaptively produce parameters for the parametric cancellation circuit. The parametric cancellation circuit further inputs the error signal and the parameters to produce the cancellation signal.
System and method for cancelling strong signals from combined weak and strong signals in communications systems
A receiver for cancelling strong signals from combined weak and strong signals includes: a first circuitry for inputting a weak and strong signal as an input; a parametric cancellation circuit for inputting a representation of the strong signal and an output of the first circuitry to produce a cancellation signal; a second circuitry electrically coupled to the parametric cancellation circuit for inputting the cancellation signal to produce a modulated output; a demodulator electronically coupled to the second circuitry for demodulating the modulated output to produce a demodulated output and an error signal, where the demodulated output is the data contained in the weak signal; and an adaptation logic circuit for inputting the representation of the strong signal, the demodulated output and the error signal to adaptively produce parameters for the parametric cancellation circuit. The parametric cancellation circuit further inputs the error signal and the parameters to produce the cancellation signal.
CURRENT MODE SIGNAL PATH OF AN INTEGRATED RADIO FREQUENCY PULSE GENERATOR
A current mode end-to-end signal path includes, a digital to analog converter (DAC), operating in current mode and an upconverting mixer, operating in current mode and operatively coupled to the DAC, wherein analog inputs and analog outputs of the DAC and the upconverting mixer are represented as currents, and the DAC generates a baseband signal.
Down-conversion mixer
A down-conversion mixer includes a converting-and-mixing circuit and a load circuit. The converting-and-mixing circuit performs voltage to current conversion and mixing with a differential oscillatory voltage signal pair upon a differential input voltage signal pair to generate a differential mixed current signal pair. The load circuit includes two transistors each having a transconductance that varies according to a control voltage, two resistors each decreasing a threshold voltage of a respective one of the transistors, and a resistor-inductor circuit cooperating with the transistors to convert the differential mixed current signal pair into a differential mixed voltage signal pair.
PASSIVE MIXER, OPERATING METHOD THEREOF, AND DEVICES INCLUDING THE SAME
A method and apparatus for input matching of a passive mixer are disclosed. The passive mixer includes a differential transistor pair including a first transistor and a second transistor, a first inductor having one end connected to the first transistor and another end connected to a ground, a second inductor having one end connected to the second transistor and another end connected to a ground, and a third inductor having one end for receiving a radio frequency (RF) signal and another end connected to a ground.
Receiver Including a Plurality of High-Pass Filters
Embodiments described herein include a receiver, a method, and a plurality of high-pass filters for demodulating a radio frequency (RF) signal. An example receiver includes a plurality of high-pass filters. The receiver includes a demodulator configured to demodulate an RF signal received at an input of the demodulator and configured to output a demodulated signal. The receiver also includes a plurality of high-pass filters connected to an output of the demodulator. The plurality of high-pass filters are configured to receive the demodulated signal and configured to high-pass filter the demodulated signal. The plurality of high-pass filters are configured to operate with a first set of filter responses during a first time period of the demodulated signal and configured to operate with a second set of filter responses during a second time period of the demodulated signal.
Tone rejection during synchronization in frequency shift keyed modulation systems
A method and apparatus for identifying a search window of carrier-frequency-offset-corrected samples in which a first intermediate signal from a demodulator does not exceed a predetermined threshold, convolving a second intermediate signal from the demodulator within the search window with a predefined pattern to provide a convolution result, determining if an absolute peak of the convolution result exceeds a preamble pattern confirmation threshold, in response to the absolute peak of the convolution result exceeding the preamble confirmation threshold, confirming a preamble pattern detection event to provide a confirmed preamble pattern detection event of a confirmed preamble pattern, and receiving a signal including the confirmed preamble pattern to provide a received digital signal extracted from the signal.
Broadband digital transmitter using π/4 phase offset local oscillator (LO) signals
A broadband digital transmitter is disclosed. The digital transmitter includes a vector decomposer circuit, a phase selector circuit, and a digital power amplifier (DPA). The vector decomposer circuit receives baseband in-phase (I) and quadrature (Q) signals and decomposes the baseband I and Q signals into an offset envelope signal and a non-offset envelope signal. The phase selector circuit receives a plurality of phase offset local oscillator (LO) signals and outputs, responsive to the baseband I and Q signals, offset LO signals and non-offset LO signals. The DPA processes the offset envelope signal, the non-offset envelope signal, the offset LO signals, and the non-offset LO signals to generate an output signal of the digital transmitter.
DC offset compensation in zero-intermediate frequency mode of a receiver
A method for operating a radio frequency communications system includes, while operating a first radio frequency communications device in a calibration mode, for each setting of a plurality of settings of a programmable gain amplifier in a receiver of the first radio frequency communications device configured in a zero-intermediate frequency mode of operation, generating an estimate of a DC offset in each of a plurality of digital samples received from an analog circuit path including the programmable gain amplifier, and storing in a corresponding storage element, a compensation value based on the estimate.