A magnetic field controlled transistor circuit includes a first electrode, a second electrode, and a channel including a magneto-resistive material. The channel is arranged between the first and second electrodes and electrically coupled to the first and second electrodes. The transistor circuit further includes a third electrode, a fourth electrode, and a control layer including an electrically conductive material. The control layer is arranged between the third and fourth electrodes and electrically coupled to the third and fourth electrodes. In addition, an insulating layer including an insulating material is provided. The insulating layer is arranged between the channel and the control layer and configured to electrically insulate the channel from the control layer. A related method for operating a transistor circuit and a corresponding design structure are also provided.

A magnetic field controlled transistor circuit includes a first electrode, a second electrode, and a channel including a magneto-resistive material. The channel is arranged between the first and second electrodes and electrically coupled to the first and second electrodes. The transistor circuit further includes a third electrode, a fourth electrode, and a control layer including an electrically conductive material. The control layer is arranged between the third and fourth electrodes and electrically coupled to the third and fourth electrodes. In addition, an insulating layer including an insulating material is provided. The insulating layer is arranged between the channel and the control layer and configured to electrically insulate the channel from the control layer. A related method for operating a transistor circuit and a corresponding design structure are also provided.

Exemplary embodiments of the disclosure are related to inductors, e.g., at least a pair of planar inductors for a wireless apparatus, for example transceivers used in a wireless device. A device may include a first planar inductor configured on a first area of a substrate. The first planar inductor includes a first loop configured to produce a first magnetic field in a first direction and a second loop configured to produce a second magnetic field in a second direction. The device further includes a second planar inductor configured on a second area of the substrate. The second planar inductor includes a third loop configured to produce a third magnetic field in a third direction. The third loop may be configured to surround the first loop and divide the second loop into an enclosed area and an external area.

Exemplary embodiments of the disclosure are related to inductors, e.g., at least a pair of planar inductors for a wireless apparatus, for example transceivers used in a wireless device. A device may include a first planar inductor configured on a first area of a substrate. The first planar inductor includes a first loop configured to produce a first magnetic field in a first direction and a second loop configured to produce a second magnetic field in a second direction. The device further includes a second planar inductor configured on a second area of the substrate. The second planar inductor includes a third loop configured to produce a third magnetic field in a third direction. The third loop may be configured to surround the first loop and divide the second loop into an enclosed area and an external area.

Exemplary embodiments of the disclosure are related to inductors, e.g., at least a pair of planar inductors, for wireless communication apparatus, for example transceivers used in a wireless device. A device may include a first planar inductor configured on a first area of a substrate. The first planar inductor includes a first loop configured to produce a first magnetic field in a first direction and a second loop configured to produce a second magnetic field in a second direction. The device further includes a second planar inductor configured on a second area of the substrate. The second planar inductor includes a third loop configured to produce a third magnetic field in a third direction and a fourth loop configured to produce a fourth magnetic field in a fourth direction. The second area may at least partially overlap the first area.

Exemplary embodiments of the disclosure are related to inductors, e.g., at least a pair of planar inductors, for wireless communication apparatus, for example transceivers used in a wireless device. A device may include a first planar inductor configured on a first area of a substrate. The first planar inductor includes a first loop configured to produce a first magnetic field in a first direction and a second loop configured to produce a second magnetic field in a second direction. The device further includes a second planar inductor configured on a second area of the substrate. The second planar inductor includes a third loop configured to produce a third magnetic field in a third direction and a fourth loop configured to produce a fourth magnetic field in a fourth direction. The second area may at least partially overlap the first area.

An amplifier includes a graphene Hall sensor (GHS). The GHS includes a graphene layer formed above a substrate, a dielectric structure formed above a channel portion of the graphene layer, and a conductive gate structure formed above at least a portion of the dielectric structure above the channel portion of the graphene layer for applying a gate voltage. The GHS also includes first and second conductive excitation contact structures coupled with corresponding first and second excitation portions of the graphene layer for applying at least one of the following to the channel portion of the graphene layer: a bias voltage; and a bias current. The GHS further includes first and second conductive sense contact structures coupled with corresponding first and second sense portions of the graphene layer. The amplifier also includes a current sense amplifier (CSA) coupled to the GHS. The CSA senses current output from the GHS.

Disclosed is an inductor device including a first curved metal plate, a second curved metal plate below and substantially vertically aligned with the first curved metal plate, and a first elongated via vertically aligned between the first curved metal plate and the second curved metal plate, the first elongated via configured to conductively couple the first curved metal plate to the second curved metal plate and having an aspect ratio of a width to a height of the first elongated via of at least approximately 2 to 1.

Disclosed is an inductor device including a first curved metal plate, a second curved metal plate below and substantially vertically aligned with the first curved metal plate, and a first elongated via vertically aligned between the first curved metal plate and the second curved metal plate, the first elongated via configured to conductively couple the first curved metal plate to the second curved metal plate and having an aspect ratio of a width to a height of the first elongated via of at least approximately 2 to 1.

A magnetic field controlled transistor circuit includes a first electrode, a second electrode, and a channel including a magneto-resistive material. The channel is arranged between the first and second electrodes and electrically coupled to the first and second electrodes. The transistor circuit further includes a third electrode, a fourth electrode, and a control layer including an electrically conductive material. The control layer is arranged between the third and fourth electrodes and electrically coupled to the third and fourth electrodes. In addition, an insulating layer including an insulating material is provided. The insulating layer is arranged between the channel and the control layer and configured to electrically insulate the channel from the control layer. A related method for operating a transistor circuit and a corresponding design structure are also provided.