The present technology relates to a decoding apparatus, a decoding method and a program which make it possible to obtain sound with higher quality. A demultiplexing circuit demultiplexes an input code string into a gain code string and a signal code string. A signal decoding circuit decodes the signal code string to output a time series signal. A gain decoding circuit decodes the gain code string. That is, the gain decoding circuit reads out gain values and gain inclination values at predetermined gain sample positions of the time series signal and interpolation mode information. An interpolation processing unit obtains a gain value at each sample position between two gain sample positions through linear interpolation or non-linear interpolation according to the interpolation mode based on the gain values and the gain inclination values. A gain applying circuit adjusts a gain of the time series signal based on the gain values. The present technology can be applied to a decoding apparatus.

Example embodiments provide a process that includes one or more of receiving an audio signal at a feedback compressor circuit, multiplying the received audio signal with a power feedback signal to create a product audio signal, wherein the feedback signal comprises a low-pass filtered signal, applying a power amplifier to the product audio signal, and providing the amplified product audio signal as an output signal to a speaker.

The invention provides a concept for combined dynamic range compression and guided clipping prevention for audio devices. An audio decoder for decoding an audio bitstream and a metadata bitstream related to the audio bitstream according to the concept includes an audio processing chain including a plurality of adjustment stages including a dynamic range control stage for adjusting a dynamic range of the audio output signal and a guided clipping prevention stage for preventing clipping of the audio output signal; and a metadata decoder configured to receive the metadata bitstream and to extract dynamic range control gain sequences and guided clipping prevention gain sequences from the metadata bitstream, at least a part of the dynamic range control gain sequences being supplied to the dynamic range control stage, and at least a part of the guided clipping prevention gain sequences being supplied to the guided clipping prevention stage.

A system may include a first input for receiving a first signal for driving an amplifier that drives a load, a second input for receiving a second signal driven by the amplifier, and an instability detector for detecting instability of a feedback loop for controlling the first signal based on comparison of the first signal and the second signal.

A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.

A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.

Example embodiments provide a process that includes one or more of receiving an audio signal at a feedback compressor circuit, receiving an auxiliary attenuation signal from an auxiliary attenuation source, determining a threshold power level based on a value of the auxiliary attenuation signal, determining an output power level of the audio signal exceeds the threshold power level, combining the audio signal with the auxiliary attenuation signal from the auxiliary attenuation source and a compressed attenuation signal from the feedback compressor circuit to create a combination signal, and generating an audio output signal of the feedback compressor circuit based on the combination signal.

In a limiting circuit that limits an output voltage of an operational amplifier, the signal quality of the output voltage is improved. The limiting circuit includes a short-circuit transistor and a gate voltage supply unit. In the limiting circuit, the short-circuit transistor short-circuits a path between an input terminal and an output terminal of the operational amplifier in a case where a voltage between the input terminal of the operational amplifier and the gate is higher than a predetermined threshold voltage. Furthermore, in the limiting circuit, the gate voltage supply unit supplies a voltage to the gate, the voltage depending on the threshold voltage and the output voltage of the output terminal.

The present disclosure provides a limiter system. The limiter system includes a first equalization filter, a low-pass filter, a first limiter, a high-pass filter, a second limiter, and a mixer. The limiter system provided by the present disclosure further includes a second equalization filter. An audio signal from a signal source first passes through the first equalization filter, the signal equalized for the first time is divided into two signals, one signal is processed by the low-pass filter and the first limiter, the other signal is processed by the high-pass filter and the second limiter, and then the two processed signals enter the mixer to be mixed and outputted. The mixed output signal is subjected to second equalization filtering by the second equalization filter to avoid clipping distortion or to obtain a higher maximum sound level.

The invention provides a concept for combined dynamic range compression and guided clipping prevention for audio devices. An audio decoder for decoding an audio bitstream and a metadata bitstream related to the audio bitstream according to the concept includes an audio processing chain including a plurality of adjustment stages including a dynamic range control stage for adjusting a dynamic range of the audio output signal and a guided clipping prevention stage for preventing clipping of the audio output signal; and a metadata decoder configured to receive the metadata bitstream and to extract dynamic range control gain sequences and guided clipping prevention gain sequences from the metadata bitstream, at least a part of the dynamic range control gain sequences being supplied to the dynamic range control stage, and at least a part of the guided clipping prevention gain sequences being supplied to the guided clipping prevention stage.