The present disclosure provides a bulk acoustic wave resonance device, a bulk acoustic wave filter device and a radio frequency front end device. The bulk acoustic wave resonance device includes a first layer including a cavity disposed at a first side of the first layer; a first electrode layer disposed in the cavity; a second layer disposed at the first side and disposed on the first electrode layer, and the second layer is a flat layer and covers the first cavity; and a second electrode layer disposed at the first side and disposed on the second layer, and the first electrode layer includes at least two first electrode bars or the second electrode layer includes at least two second electrode bars. The present disclosure can increase the difference between acoustic impedance of a resonance region and a non-resonance region, thereby increasing Q value of the resonance device.

Various embodiments of the disclosure disclose a method and apparatus, comprising: a communication processor; a radio frequency integrated circuit (RFIC) connected to the communication processor and outputting at least one of a first radio frequency signal, a second radio frequency signal, a third radio frequency signal, and a fourth radio frequency signal; a first circuit connected to the RFIC and including a first filter; a first radio frequency front end (RFFE) connected to the first circuit and including a first amplifier configured to amplify the first radio frequency signal and/or the third radio frequency signal; and a second RFFE including a second amplifier configured to amplify the second radio frequency signal and/or the fourth radio frequency signal output from the RFIC, wherein the communication processor is configured to control the first circuit to remove the fourth radio frequency signal induced to the first circuit through the first filter.

A glitch filter is provided. The glitch filter receives an input signal and sets a voltage level of an intermediary input node in accordance with a state of the input signal. The glitch filter charges or discharges a switched capacitance based on the voltage level of the intermediary input node and charges or discharges a filter capacitance based on a charge of the switched capacitance. The glitch filter sets a state of an output signal based on the charge of the filter capacitance. The glitch filter includes a reset stage that at least partially filters a burst of glitches in the input signal from the output signal by controlling the charge of the switched capacitance based on the state of the input signal and the state of the output signal.

An apparatus comprises: a first circuitry to charge first and second capacitors to a predetermined voltage level; a second circuitry to discharge the first capacitor through a diode at a first time; a third circuitry to discharge the second capacitor through the diode at a second time, wherein the second time is greater than the first time; a comparator to compare a first voltage of the first capacitor with a second voltage of the second capacitor; and logic to adjust a scaling factor applied to the second voltage according to an output of the comparator.

The present disclosure provides an audio amplifying circuit and a playing device, including: N-order filters and an integrated circuit; after an original audio signal passes through the N-order filters, a filtered signal is obtained; after the filtered signal passes through the integrated circuit, a corresponding digital signal is output; where the number of operational amplifiers adopted in the N-order filters is smaller than N, and N is a natural number greater than 1.

A first portion of a programmable switched capacitor block includes a first plurality of switched capacitors and a second portion of the programmable switched capacitor block includes a second plurality of switched capacitors. A first switch associated with the first plurality of switched capacitors as well as a second switch associated with the second plurality of switched capacitors may be configured based on a type of analog function that is to be provided. The configuring of the first analog and the second analog block may include the configuring of the first switch associated with the first plurality of switched capacitors when the analog function operates on a first single ended signal and the configuring of both the first and second switches when the analog function operates on a differential signal.

In certain aspects, a system includes a voltage line, a switched-capacitor circuit coupled to the voltage line, and a ripple-cancellation circuit. The ripple-cancellation circuit includes a current mirror having a first branch and a second branch, wherein the second branch of the current mirror is coupled to the voltage line, a switching circuit having a first terminal, a second terminal, and a third terminal, wherein the first terminal of the switching circuit is coupled to the first branch of the current mirror, and the third terminal is coupled to a ground or a reference voltage, and a first capacitor coupled to the second terminal of the switching circuit.

The present invention discloses a programmable gain amplifier having mode-switching mechanism. An operational amplifier includes a first input terminal, a second input terminal and an output terminal. The second input terminal is coupled to a ground terminal. The output terminal generates an output signal. A variable resistor and a first switch are coupled in series between a first terminal and a second terminal that coupled to the first input terminal. A first variable capacitor and a second switch are coupled in series between the first terminal and the second terminal. A second variable capacitor and a third switch are coupled in series between the first terminal and the ground terminal. A low-pass resistor and a low-pass capacitor are coupled in parallel between the first input terminal and the output terminal. An input resistor is coupled between a signal input terminal and the first terminal to receive an input signal from the signal input terminal. The first, the second and the third switches receive a set of mode-switching signals to switch to form a path or an open-circuit.

A tunable matching circuit for use with ultra-low power RF receivers is described to support a variety of RF communication bands. A switched-capacitor array and a switched-resistor array are used to adjust the input impedance presented by the operating characteristics of transistors in an ultra-low-power mode. An RF sensor may be used to monitor performance of the tunable matching circuit and thereby determine optimal setting of the digital control word that drives the switched-capacitor array and switched-resistor array. An effective match over a significant bandwidth is achievable. The optimal matching configuration may be updated at any time to adjust to changing operating conditions. Memory may be used to store the optimal matching configurations of the switched capacitor array and switched resistor array.

A circuit for processing an input-signal voltage comprises a first comparator comprising a first-comparator sense node and a reference capacitance that is coupled to the first-comparator sense node, a second comparator comprising a second-comparator sense node, and a comparator select switch coupled between a path input terminal of the circuit and the first-comparator sense node and the second-comparator sense node. A method of processing at least one input-signal voltage using at least one associated threshold voltage in a circuit, wherein a plurality of comparators comprises more comparators than there are path input terminals coupled to path output terminals, comprises selectively making a coupling via one comparator of two comparators provided in parallel to form a coupling path from the path input terminal to an associated path output terminal, while breaking the coupling via the other comparator.