An apparatus and method are provided to re-configure an existing low-jitter phase locked loop (PLL) circuit for fast start-up during system wake-up. During system start-up, a feed-back path of the PLL is disconnected to independently control the VCO frequency. This independently controlled VCO then injects energy into a resonator (e.g., a crustal oscillator) for its fast start-up. Once a resonance frequency of the resonator is detected and an oscillation builds up in the resonator, a VCO control voltage is stored. The PLL feedback is then restored and the stored VCO control voltage is applied to perform phase-locking operation. Since the PLL control voltage is already set to the desired operating point, the PLL lock time is very small.

A system includes a power driver, configured to generate an electric excitation; an oscillating system, configured to perform an oscillation induced by the electric excitation; a feedback detector, configured to detect a feedback measurement signal with to the oscillation; and a controller configured to operate: in a closed loop mode, to control the power driver to generate the electric excitation as a discontinuous electric excitation according to timing information obtained from the detected feedback measurement signal, to synchronize the discontinuous electric excitation with the detected feedback measurement signal; in a learning mode preceding the closed loop mode, to control the power driver to generate the electric excitation as a continuous electric excitation, to obtain timing information from the feedback measurement signal to be used, at least once, in the subsequent closed loop mode, to synchronize the discontinuous electric excitation with the detected feedback measurement signal.

A system includes a power driver, configured to generate an electric excitation; an oscillating system, configured to perform an oscillation induced by the electric excitation; a feedback detector, configured to detect a feedback measurement signal with to the oscillation; and a controller configured to operate: in a closed loop mode, to control the power driver to generate the electric excitation as a discontinuous electric excitation according to timing information obtained from the detected feedback measurement signal, to synchronize the discontinuous electric excitation with the detected feedback measurement signal; in a learning mode preceding the closed loop mode, to control the power driver to generate the electric excitation as a continuous electric excitation, to obtain timing information from the feedback measurement signal to be used, at least once, in the subsequent closed loop mode, to synchronize the discontinuous electric excitation with the detected feedback measurement signal.

An electronic device comprises a regulator, and an oscillator and a resistor coupled to the regulator. The electronic device further comprises a feedback controller that includes a differential amplifier coupled between the oscillator, the resistor, and the regulator. The feedback controller is configured to apply a control voltage to the regulator in response to a resistor voltage upon the resistor and an oscillator voltage upon the oscillator. The feedback controller can be coupled to control a substantially equal voltage upon the resistor and the oscillator.

The disclosure relates to technology for power supply for a voltage controller oscillator (VCO). A peak detector circuit determines the amplitude of the output for the VCO, which is compared to a reference value in an automatic gain control loop. An input voltage for the VCO is determined based on a difference between the reference value and the output of the peak detector circuit. The peak detector circuit can be implemented using parasitic bipolar devices in an integrated circuit formed in a CMOS process.

A ring oscillator including: an oscillation circuit including an even number of inverters connected in a ring configuration, the oscillation circuit outputting a clock signal; plural potential fixing circuits respectively connected between pairs of the inverters, each of plural potential fixing circuits being switchable between a connected and a disconnected state in response to a first control signal; and an adjustment circuit that adjusts a drive capability of the inverters based on a second control signal, wherein, during startup, the drive capability is controlled to be a first capability, in which the potential fixing circuits are connected, by the first control signal, and wherein, after a predetermined time has elapsed after the first control signal is output, the drive capability is controlled to be a second capability, higher than the first capability, in which the potential fixing circuits are disconnected, by the second control signal.

A ring oscillator including: an oscillation circuit including an even number of inverters connected in a ring configuration, the oscillation circuit outputting a clock signal; plural potential fixing circuits respectively connected between pairs of the inverters, each of plural potential fixing circuits being switchable between a connected and a disconnected state in response to a first control signal; and an adjustment circuit that adjusts a drive capability of the inverters based on a second control signal, wherein, during startup, the drive capability is controlled to be a first capability, in which the potential fixing circuits are connected, by the first control signal, and wherein, after a predetermined time has elapsed after the first control signal is output, the drive capability is controlled to be a second capability, higher than the first capability, in which the potential fixing circuits are disconnected, by the second control signal.

Methods and apparatus are disclosed to generate an oscillating output signal having a voltage swing greater than a voltage swing across nodes of active devices. An example oscillator includes a tank to generate an oscillating output signal in response receiving an edge of an enable signal; a feedback generator including a first gain stage forming a first feedback loop with the tank, the first feedback loop providing a first charge to maintain the oscillating output signal and a second gain stage forming a second feedback loop with the tank, the second feedback loop providing a second charge to maintain the oscillating output signal, the first and second charges combining with the oscillating output signal to generate a high voltage swing; and an attenuator connected between the tank and the feedback generator to isolate the tank from active components of the feedback generator.

A trigger, includes: a first voltage input terminal; a bias voltage input terminal; a first bias transistor having a scaling of N to a first component of an external device; a comparator transistor having a scaling of N to a second component of the external device; a first switch transistor and a second switch transistor; a shunt transistor having a control terminal connected to the first voltage input terminal, a second terminal connected to the second terminal of the second switch transistor, and a first terminal connected to the first terminal of the comparator transistor. The shunt transistor has an enlarging scale of M to the comparator transistor. A voltage output terminal is respectively connected to the second terminal of the first switch transistor, the control terminal of the second switch transistor, and the second terminal of the comparator transistor.

A trigger, includes: a first voltage input terminal; a bias voltage input terminal; a first bias transistor having a scaling of N to a first component of an external device; a comparator transistor having a scaling of N to a second component of the external device; a first switch transistor and a second switch transistor; a shunt transistor having a control terminal connected to the first voltage input terminal, a second terminal connected to the second terminal of the second switch transistor, and a first terminal connected to the first terminal of the comparator transistor. The shunt transistor has an enlarging scale of M to the comparator transistor. A voltage output terminal is respectively connected to the second terminal of the first switch transistor, the control terminal of the second switch transistor, and the second terminal of the comparator transistor.