H04L7/00

CLOCK DETERMINING METHOD AND RELATED APPARATUS
20230050042 · 2023-02-16 ·

A clock determining method includes: when both a second network device and a first network device are synchronous with a reference clock, simulating, by using delay information between the second network device and the first network device and clock frequency information of the second network device, a second virtual clock synchronized with a first virtual clock, where the first virtual clock is used to simulate a clock of the first network device. A clock of the second network device can thus be simulated to perform a subsequent operation by using the simulated clock. For example, the simulated clock may be used to estimate precision time protocol (PTP) message synchronization performance of the second network device. Therefore, the PTP message synchronization performance of the second network device may be pre-determined before a global navigation satellite system (GNSS) fails, to guide network operation and maintenance activities.

Signal relay apparatus and method having frequency calibration mechanism
20230046082 · 2023-02-16 ·

The present invention discloses a signal relay apparatus having frequency calibration mechanism that includes a clock generation circuit, a frequency generation circuit, a clock measuring circuit, a frequency adjusting circuit and a transmission circuit. The clock generation circuit generates a source clock signal. The frequency generation circuit receives the source clock signal and generates a target frequency signal according to a conversion parameter. The clock measuring circuit measures a first frequency offset of a source frequency relative to a first predetermined frequency according to an external reference clock signal. The frequency adjusting circuit adjusts the conversion parameter according to the first frequency offset when the first frequency offset is not within a first predetermined range such that a second frequency offset of a target frequency relative to a second predetermined frequency is within a second predetermined range. The transmission circuit performs signal transmission according to the target frequency signal.

SYSTEM FOR ANALYSING PASSIVE NETWORK
20230049534 · 2023-02-16 · ·

A system for analyzing a passive network is provided, the system being configured to extend the frequency band with the interpolation function of the low frequency band and the extrapolation function of the high frequency band for S-parameters with limited measurement band, adjust the propagation delay time for the band-extended S-parameter to derive the final band-extended S-parameter, and analyze the time response of the passive network on the basis of the output voltage waveform estimated by performing convolution on the impulse response to the derived final band-extended S-parameter and the input voltage waveform of the passive network, thereby improving the time response performance of the passive network without a complex circuit conversion process, and making it possible to be capable of lightweight structures. Furthermore, it is possible to improve the accuracy of the impulse response by adjusting the propagation delay time removed from the band-limited S-parameter.

THWARTING SYN FLOOD DDOS ATTACKS
20230048431 · 2023-02-16 ·

A system for efficiently thwarting syn flood DDoS attacks on a target server including a CPU, the system comprising: network controller hardware having steering capability; and a software application to create and to configure initial steering object/s which define a steering configuration of the network controller and monitor at least one opened connection to the server, including updating the steering configuration responsive to establishment of at least one connection to the server, wherein the network controller hardware's steering capability is used to provide a SYN cookie value used for said thwarting, and to send at least one packet, modified, to the packet's source.

Active 1:N breakout cable

Accordingly, there are disclosed herein active cables and methods that enable direct connection between different generations of network interface ports or ports supporting different standards. One illustrative embodiment is an active 1:N breakout cable that includes a unary end connector connected by electrical conductors to each of multiple split end connectors. The unary end connector is adapted to fit into a network interface port of a primary host device to provide output PAM4 electrical signals that convey a multi-lane outbound data stream to the primary host device and to accept input PAM4 electrical signals that convey multi-lane inbound data stream from the primary host device. Each of the split end connectors is adapted to fit into a network interface port of a secondary host device to provide output NRZ electrical signals that convey a split portion of the inbound data stream to that secondary host device and to accept input NRZ electrical signals that convey a split portion of the outbound data stream from that secondary host device.

Translation device, test system including the same, and memory system including the translation device

A translation device, a test system, and a memory system are provided. The translation device includes plural first input/output (I/O) circuits that respectively transmit and receive first signals through plural pins based on a pulse amplitude modulation (PAM)-M mode, a second I/O circuit that transmits and receives a second signal through one or more pins based on a PAM-N mode, and a translation circuit that translates the first signals into the second signal and translates the second signal into the first signals. M and N are different integers of 2 or more.

Communication device and communication system

[Object] Effectively perform data communication [Solving Means] A communication device includes: a LINK that generates a first output signal on a basis of a first external signal from a first external device, outputs the first output signal to a second external device, generates a second output signal on a basis of a second external signal from the second external device, and outputs the second output signal to the first external device, in which each of the first output signal and the second external signal includes command information indicating content of a command transmitted from the first external device, final-destination-device-identification-information for identifying a final destination device of data transmitted from the first external device, internal address information indicating an internal address of the final destination device, data length information indicating a length of the data transmitted from the first external device, and data-end-position-information indicating an end position of the data transmitted from the first external device.

Receiving apparatus, receiving method and program

A reception apparatus includes a detection unit that detects occurrence of a phase slip in phase estimation values of time-series received symbol data, and determines an inclination of the phase slip, a delay processing unit that generates first received signal data obtained by delaying received signal data obtained from the time-series received symbol data by one symbol time interval, a phase shift unit that generates second received signal data by performing phase shift according to the inclination, only in a period in which one symbol time interval elapses, on only the received signal data of a symbol time at which the occurrence of the phase slip is detected among pieces of the received signal data, and a remainder processing unit that derives a remainder of a difference between the second received signal data and the first received signal data.

Clock data calibration circuit

A clock data calibration circuit including a first comparator, a multi-phase clock generator, a plurality of samplers, a plurality of data comparators and a data selector is provided. The first comparator compares first input data with second input data to generate a data signal. The multi-phase clock generator generates a plurality of clock signals, and the clock signals are divided into a plurality of clock groups. The sampler samples the data signal according to the clock groups to respectively generate a plurality of first sampled data signal groups. The data comparators respectively sample the first sampled data signal groups according to selected clocks to generate a plurality of second sampled data signal groups. Each data comparator generates a plurality of status flags according to a variation state of a plurality of second sampled data. The data selector generates a plurality of output data signals according to the status flags.

Preventing audio delay-induced miscommunication in audio/video conferences

Embodiments for delay-induced miscommunication reduction are provided. The embodiment may include capturing data streams transmitted between participants in an A/V exchange; translating, on a sender device prior to transmission to a recipient device, an audio stream within the data streams to text; timestamping, on a sender device prior to transmission to the recipient device, each word in the translated audio stream; transmitting the audio stream and the sender-side translated and timestamped audio stream to the recipient device; translating, on the recipient device, the transmitted audio stream to text; timestamping, on the recipient device, each word in the translated audio stream; determining a lag exists in the A/V exchange based on a comparison of each timestamp for corresponding words on the sender-side translated and timestamped audio stream and the recipient-side translated and timestamped audio stream; and generating a true transcript of an intended exchange between the participants based on the comparison.