A ratiometric vapor sensor is described that includes a first sensor and a second sensor. The first sensor includes a first semiconductor component comprising a vapor-sensitive semiconducting organic compound, while the second sensor includes a second semiconductor component comprising a modified vapor-sensitive semiconducting organic compound including a modifying organic group. The ratiometric vapor sensor can be used to detect the presence of a vapor such as nitrogen dioxide, and determine the concentration of the vapor by comparing the outputs of electrodes connected to the first and second sensor.

A semiconductor apparatus includes a plurality of semiconductor devices. The semiconductor devices each include a ferroelectric layer, a conductive metal oxide layer, and a semiconductor layer, between two electrodes. The conductive metal oxide layer may be between the ferroelectric layer and the semiconductor layer. The ferroelectric layer, the conductive metal oxide layer, and the semiconductor layer may all include a metal oxide. The conductive metal oxide layer may include one or more materials selected from the group consisting of an indium oxide, a zinc oxide, a tin oxide, and any combination thereof.

A semiconductor apparatus includes a plurality of semiconductor devices. The semiconductor devices each include a ferroelectric layer, a conductive metal oxide layer, and a semiconductor layer, between two electrodes. The conductive metal oxide layer may be between the ferroelectric layer and the semiconductor layer. The ferroelectric layer, the conductive metal oxide layer, and the semiconductor layer may all include a metal oxide. The conductive metal oxide layer may include one or more materials selected from the group consisting of an indium oxide, a zinc oxide, a tin oxide, and any combination thereof.

The present application discloses a conductive laminated structure, a manufacturing method thereof, and a display panel. The conductive laminated structure provided by the present application comprises a substrate; an adhesion enhancement layer disposed on the substrate; a metal nanowire layer disposed on the adhesion enhancement layer and having a first opening to expose the adhesion enhancement layer; a wiring layer disposed on the metal nanowire layer and having a second opening at least partially overlapping the first opening to expose the adhesion enhancement layer; and an optical adhesive layer disposed on the wiring layer, filled in the second opening and the first opening and connected to the adhesion enhancement layer. Because the metal nanowire layer is in direct contact with the wiring layer, the conducting capability is enhanced, and a reduced contacting area is needed, so that the wiring layer can be relatively narrow.

A solid-state imaging element according to an embodiment of the present disclosure includes a first electrode including a plurality of electrodes, a second electrode opposed to the first electrode, and a photoelectric conversion layer provided between the first electrode and the second electrode, and the first electrode has, at least in a portion, an overlap section where the plurality of electrodes overlap each other with a first insulation layer interposed therebetween.

A memory device according to an embodiment includes a fluid layer extending in a first direction, a particle in the fluid layer, a first control electrode made of a first material, a first insulating film provided between the fluid layer and the first control electrode, a second control electrode made of a second material and provided to be spaced apart from the first control electrode in the first direction, a second insulating film provided between the fluid layer and the second control electrode, a third control electrode made of a third material different from the first material and the second material and provided between the first control electrode and the second control electrode, and a third insulating film provided between the fluid layer and the third control electrode.

A compound of Chemical Formula 1, and an organic photoelectric device, an image sensor, and an electronic device including the same are disclosed: ##STR00001## In Chemical Formula 1, each substituent is the same as described in the detailed description.

A memory cell includes a first conductive line, a lower electrode, a carbon nano-tube (CNT) layer, a middle electrode, a resistive layer, a top electrode and a second conductive line. The first conductive line is disposed over a substrate. The lower electrode is disposed over the first conductive line. The carbon nano-tube (CNT) layer is disposed over the lower electrode. The middle electrode is disposed over the carbon nano-tube layer, thereby the lower electrode, the carbon nano-tube (CNT) layer and the middle electrode constituting a nanotube memory part. The resistive layer is disposed over the middle electrode. The top electrode is disposed over the resistive layer, thereby the middle electrode, the resistive layer and the top electrode constituting a resistive memory part. The second conductive line is disposed over the top electrode.

A variable resistance memory device including a stack including insulating sheets and conductive sheets, which are alternatingly stacked on a substrate, the stack including a vertical hole vertically penetrating therethrough, a bit line on the stack, a conductive pattern electrically connected to the bit line and vertically extending in the vertical hole, and a resistance varying layer between the conductive pattern and an inner side surface of the stack defining the vertical hole may be provided. The resistance varying layer may include a first carbon nanotube electrically connected to the conductive sheets, and a second carbon nanotube electrically connected to the conductive pattern.

A display device includes: a first pixel group including first, second and third pixels arranged adjacent to each other and positioned successively along a first direction; and a second pixel group including fourth, fifth and sixth pixels arranged adjacent to the first pixel group and positioned successively along the first direction. Multiple ones of each of the first pixel group and the second pixel group are arranged in an alternating manner along both the first direction and a second direction intersecting the first direction. The second pixel and the fifth pixel face each other with respect to a first gate line while being connected to the first gate line, the first pixel and the fourth pixel face each other with respect to a second gate line while being connected to the second gate line.