An integrated circuit (IC) device includes a chip having a semiconductor substrate and a thermoelectric module embedded in the semiconductor substrate, where the thermoelectric module includes a first semiconductor structure electrically connected to a second semiconductor structure, where a bottom portion of thermoelectric module extends through a thickness of the semiconductor substrate, and where the first semiconductor structure and the second semiconductor structure include dopants of different conductivity types.

A package structure is provided. The package structure includes a semiconductor die and a thermoelectric structure disposed on the semiconductor die. The thermoelectric structure includes P-type semiconductor blocks, N-type semiconductor blocks and metal pads. The P-type semiconductor blocks and the N-type semiconductor blocks are arranged in alternation with the metal pads connecting the P-type semiconductor blocks and the N-type semiconductor blocks. When a current flowing through one of the N-type semiconductor block, one of the metal pad, and one of the P-type semiconductor block in order, the metal pad between the N-type semiconductor block and the P-type semiconductor block forms a cold junction which absorbs heat generated by the semiconductor die.

Systems, methods, and devices of the various embodiments provide for microfabrication of devices, such as semiconductors, thermoelectric devices, etc. Various embodiments may include a method for fabricating a device, such as a semiconductor (e.g., a silicon (Si)-based complementary metal-oxide-semiconductor (CMOS), etc.), thermoelectric device, etc., using a mask. In some embodiments, the mask may be configured to allow molecules in a deposition plume to pass through one or more holes in the mask. In some embodiments, molecules in a deposition plume may pass around the mask. Various embodiments may provide thermoelectric devices having metallic junctions. Various embodiments may provide thermoelectric devices having metallic junctions rather than junctions formed from semiconductors.

Provided herein is a thermoelectric element that includes a cold end, a hot end, and a p-type or n-type material having a length between the hot end and the cold end. The p-type or n-type material has an intrinsic Seebeck coefficient (S), an electrical resistivity (ρ), and a thermal conductivity (λ). Each of two or more of S, ρ, and λ generally increases along the length from the cold end to the hot end. The thermoelectric element may be provided in single-stage thermoelectric devices providing enhanced maximum temperature differences. The single-stage thermoelectric devices maybe combined with one another to provide multi-stage thermoelectric devices with even further enhanced maximum temperature differences.

An electrically-powered device, structure and/or component is provided that includes an attached electrical power source in a form of a unique, environmentally-friendly energy harvesting element or component. The energy harvesting component provides a mechanism for generating autonomous renewable energy, or a renewable energy supplement, in the integrated circuit system, structure and/or component. The energy harvesting element includes a first conductor layer, a low work function layer, a dielectric layer, and a second conductor layer that are particularly configured in a manner to promote electron migration from the low work function layer, through the dielectric layer, to the facing surface of the second conductor layer in a manner that develops an electric potential between the first conductor layer and the second conductor layer. The energy harvesting component includes a plurality of energy harvesting elements electrically connected to one another to increase an electrical power output.

The present disclosure is related to thermoelectric panels and their use in cooling and heating systems. The cooling/heating systems may include a plurality of thermoelectric panels. The panels may include thermoelectric devices embedded between a housing formed by heat conductive layers and edge structures for preserve a low thermal conductivity volume.

An integrated circuit (IC) package comprising an IC die, the IC die having a first surface and an opposing second surface. The IC die comprises a semiconductor material. The first surface comprises an active layer. A thermoelectric cooler (TEC) comprising a thermoelectric material is embedded within the IC die between the first surface and the second surface and adjacent to the active layer. The TEC has an annular shape that is substantially parallel to the first and second surfaces of the IC die. The thermoelectric material is confined between an outer sidewall along an outer perimeter of the TEC and an inner sidewall along an inner perimeter of the TEC. The outer and inner sidewalls are substantially orthogonal to the first and second surfaces of the IC die.

A method of fabricating a thermoelectric converter that includes providing a layer of a Silicon-based material having a first surface and a second surface, opposite to and separated from the first surface by a Silicon-based material layer thickness; forming a plurality of first thermoelectrically active elements of a first thermoelectric semiconductor material having a first Seebeck coefficient, and forming a plurality of second thermoelectrically active elements of a second thermoelectric semiconductor material having a second Seebeck coefficient, wherein the first and second thermoelectrically active elements are formed to extend through the Silicon-based material layer thickness, from the first surface to the second surface; forming electrically conductive interconnections in correspondence of the first surface and of the second surface of the layer of Silicon-based material, for electrically interconnecting the plurality of first thermoelectrically active elements and the plurality of second thermoelectrically active elements, and forming an input electrical terminal and an output electrical terminal electrically connected to the electrically conductive interconnections, wherein the first thermoelectric semiconductor material and the second thermoelectric semiconductor material comprise Silicon-based materials selected among porous Silicon or polycrystalline SiGe or polycrystalline Silicon.

Self-cooling semiconductor resistor and manufacturing method thereof are provided. The resistor comprises: multiple N-type and P-type wells in a semiconductor substrate, first polysilicon gates on each N-type well, second polysilicon gates on each P-type well, and metal interconnect layers. The multiple N-type and P-type wells are arranged alternately in row and column direction, respectively. N-type and P-type deep doped regions are formed on each N-type and P-type well, respectively. The first and second polysilicon gates are N-type and P-type deep doped respectively, and there is no gate oxide layer between the first and second polysilicon gates and the semiconductor substrate. The metal interconnect layers connect the multiple first and second polysilicon gates as an S-shaped structure. In the present application, the flow direction of heat is from the inside of the resistor to its surface, thereby realizing heat dissipation and cooling.

The disclosure is related to structures and method of making thermoelectric devices. The structures include an electrically and thermally nonconductive substrate with cylindrical or frustum-shaped tunnels. The tunnels may be filled with thermally and electrically conductive materials that resist diffusion. The structures include n-type and p-type materials, in homogeneous form or alternating with interlayers to block phonon conduction between layers of thermoelectric materials. The tunnels are individually associated with either n-type or p-type thermoelectric materials and connected in pairs to form alternating conductors on both sides of the substrate. The structures may also be coated with layers of gold and nickel and have thermoelectric materials deposited in the tunnels. The tunnels may be partially or fully capped with sintered nano-silver or solder. Notches may alternate sides to electrically isolate each side of the structure to provide current flow between the p-type and n-type thermoelectric layers.