Patent classifications
H10P70/00
Cleaning solution and method of cleaning wafer
A cleaning solution includes a solvent having Hansen solubility parameters: 25>.sub.d>13, 25>.sub.p>3, 30>.sub.h>4; an acid having an acid dissociation constant pKa: 11<pKa<4, or a base having pKa of 40>pKa>9.5; and a surfactant. The surfactant is an ionic or non-ionic surfactant, selected from ##STR00001##
R is substituted or unsubstituted aliphatic, alicyclic, or aromatic group, and non-ionic surfactant has A-X or A-X-A-X structure, where A is unsubstituted or substituted with oxygen or halogen, branched or unbranched, cyclic or non-cyclic, saturated C2-C100 aliphatic or aromatic group, X includes polar functional groups selected from OH, O, S, P, P(O.sub.2), C(O)SH, C(O)OH, C(O)OR, O, N, C(O) NH, SO.sub.2OH, SO.sub.2SH, SOH, SO.sub.2, CO, CN, SO, CON, NH, SO.sub.3NH, and SO.sub.2NH.
Post CMP cleaning apparatus and post CMP cleaning methods
A post CMP cleaning apparatus is provided. The post CMP cleaning apparatus includes a cleaning stage. The post CMP cleaning apparatus also includes a rotating platen disposed in the cleaning stage, and the rotating platen is configured to hold and rotate a semiconductor wafer. The post CMP cleaning apparatus further includes a vibrating device disposed over the rotating platen. The post CMP cleaning apparatus further includes a solution delivery module disposed near the vibrating device and configured to deliver a cleaning fluid to the semiconductor wafer. The vibrating device is configured to provide the cleaning fluid with a specific frequency which is at least greater than 100 MHz while the rotating platen is rotating the semiconductor wafer, so that particles on the semiconductor wafer are removed by the cleaning fluid.
Methods for selectively removing material
Provided is a conductive structure and a method for forming such a structure. The method includes forming a treatable layer by depositing a layer comprising a metal over a structure; performing a directional treatment process on a targeted portion of the treatable layer to convert the targeted portion to a material different from a non-targeted portion of the treatable layer, wherein the directional treatment process is selected from the group consisting of nitridation, oxidation, chlorination, carbonization; and selectively removing the non-targeted portion from the structure, wherein the targeted portion remains over the structure.
Substrate processing method and substrate processing apparatus
A substrate processing method includes providing a substrate formed with a stacked film including at least an etching target film, an underlying layer disposed below the etching target film, and a mask disposed above the etching target film; etching the etching target film through the mask using plasma; and performing heat treatment on the substrate at a predetermined temperature after the etching. At least one of the mask and the underlying layer contains a transition metal.
Substrate processing method and sublimation drying processing agent
The present invention includes a liquid film formation step of supplying a processing liquid in which a sublimation drying processing agent obtained by mixing a first sublimable substance and a second sublimable substance which are different from each other in a eutectic composition or a near-eutectic composition is liquefied, onto a front surface of a substrate on which a pattern is formed, to thereby form a liquid film of the processing liquid on the front surface of the substrate, a solidified film formation step of solidifying the liquid film of the processing liquid, to thereby form a solidified film of the sublimation drying processing agent, and a sublimation step of sublimating the solidified film, to thereby remove the solidified film from the front surface of the substrate.
Processing tool and method
Provided are a tool and a method for processing a semiconductor wafer. A processing method includes supporting a semiconductor wafer continuously along a periphery of the semiconductor wafer with an electrically grounded conductive member; and spinning the semiconductor wafer, wherein surface charges induced during spinning are dissipated by movement of electrons from the semiconductor wafer to the electrically grounded conductive member at the periphery of the semiconductor wafer.
PLATE FLOW PATHS FOR GAS ACTIVATION, AND RELATED CHAMBER KITS, METHODS, AND PROCESSING CHAMBERS
The present disclosure relates to plate flow paths for gas activation, and related chamber kits, methods, and processing chambers. In one or more embodiments, a processing chamber includes a plate apparatus that includes one or more gas inlet openings in the plate apparatus on the first side of the processing volume, one or more gas outlet openings in the plate apparatus on a second side of the processing volume, and one or more gas flow channels. The one or more gas flow channels are operable to flow a gas through the plate apparatus between the one or more gas inlet openings and the one or more gas outlet openings. The one or more gas outlet openings are operable to inject the gas into the processing volume on the second side to flow the gas horizontally across the processing volume and to the one or more gas exhaust outlets.
Methods of forming an abrasive slurry and methods for chemical-mechanical polishing
Methods of forming a slurry and methods of performing a chemical mechanical polishing (CMP) process utilized in manufacturing semiconductor devices, as described herein, may be performed on semiconductor devices including integrated contact structures with ruthenium (Ru) plug contacts down to a semiconductor substrate. The slurry may be formed by mixing a first abrasive, a second abrasive, and a reactant with a solvent. The first abrasive may include a first particulate including titanium dioxide (TiO.sub.2) particles and the second abrasive may include a second particulate that is different from the first particulate. The slurry may be used in a CMP process for removing ruthenium (Ru) materials and dielectric materials from a surface of a workpiece resulting in better WiD loading and planarization of the surface for a flat profile.
Plasma-assisted etching of metal oxides
The present disclosure describes methods and systems for plasma-assisted etching of a metal oxide. The method includes modifying a surface of the metal oxide with a first gas, removing a top portion of the metal oxide by a ligand exchange reaction, and cleaning the surface of the metal oxide with a second gas.
Method for manufacturing semiconductor device and forming photoresist pattern
A method of manufacturing a semiconductor device includes: forming a pattern formation material layer on a substrate; forming a photoresist on the pattern formation material layer; exposing and developing the photoresist to form a photoresist pattern; performing a first deionized water cleaning on the photoresist pattern; cleaning the photoresist pattern with a cleaning solution including a surfactant; and performing a second deionized water cleaning on the photoresist pattern.