Transparent conductive coatings are polished using particle slurries in combination with mechanical shearing force, such as a polishing pad. Substrates having transparent conductive coatings that are too rough and/or have too much haze, such that the substrate would not produce a suitable optical device, are polished using methods described herein. The substrate may be tempered prior to, or after, polishing. The polished substrates have low haze and sufficient smoothness to make high-quality optical devices.

A multi-layered beauty care product is provided. The beauty care product has a layer of a water-soluble film zone with a water-soluble film forming polymer and a cosmetic composition with a skin active agent. The product also has a vapor-deposited coating. The vapor-deposited coating is a poly(p-xylylene) polymer and/or a metal oxide inorganic coating.

Molybdenum(0) coordination complexes comprising ligands which each coordinate to the metal center by nitrogen or phosphorous are described. Methods for depositing molybdenum-containing films on a substrate are described. The substrate is exposed to a molybdenum precursor and a reactant to form the molybdenum-containing film (e.g., elemental molybdenum, molybdenum oxide, molybdenum carbide, molybdenum silicide, molybdenum nitride). The exposures can be sequential or simultaneous.

A method of applying a multi-layer plasma resistant coating on an article comprises performing plating or ALD to form a conformal first plasma resistant layer on an article, wherein the conformal first plasma resistant layer is formed on a surface of the article and on walls of high aspect ratio features in the article. The conformal first plasma resistant coating has a porosity of approximately 0% and a thickness of approximately 200 nm to approximately 1 micron. One of electron beam ion assisted deposition (EB-IAD), plasma enhanced chemical vapor deposition (PECVD), aerosol deposition or plasma spraying is then performed to form a second plasma resistant layer that covers the conformal first plasma resistant layer at a region of the surface but not at the walls of the high aspect ratio features.

A layered metal -graphene-metal nanolaminate electrical connector with improved wear performance and reduced friction. An electrical connector has a chemical vapor deposition (CVD) monolayer graphene sheet sandwiched between two copper layers resulting in a decrease in friction of coefficient and an improvement in wear resistance of an electrical contact.

Transparent conductive coatings are polished using particle slurries in combination with mechanical shearing force, such as a polishing pad. Substrates having transparent conductive coatings that are too rough and/or have too much haze, such that the substrate would not produce a suitable optical device, are polished using methods described herein. The substrate may be tempered prior to, or after, polishing. The polished substrates have low haze and sufficient smoothness to make high-quality optical devices.

There are provided a food container having a silicon incorporated diamond like carbon (Si-DLC) layer and a method thereof. The food container includes a container made of a plastic material; an intermediate thin layer formed on a surface of the container; and a Si-DLC layer formed on the intermediate thin layer. Accordingly, it is possible to provide porous plastic container having a Si-DLC layer and a manufacturing method thereof, which can implement high oxygen barrier properties and excellent mechanical characteristics by stably depositing a Si-DLC layer on a food container having lower surface energy without breaking the Si-DLC layer.

A cutting tool such as a drill (1) in which a coating layer (6) is provided to the surface of a base body (5) having a rod shape, which is equipped with a cutting edge (2) provided to at least the tip portion (A) of the base body (5) having a rod shape and a chip discharge section (4) provided adjacent to the cutting edge (2) so as to extend rearwards (i.e., towards the rear end) from the tip portion (A), the coating layer (6) comprising a mixture phase of diamond and graphite and having a diamond content ratio which is lower in a rear end located 10 mm rearward from the tip than in the tip portion (A).

The invention is a method for chemical mechanical polishing a semiconductor substrate having cobalt or cobalt alloy containing features containing Co.sup.0. The method mixes 0.1 to 2 wt % hydrogen peroxide oxidizing agent () into a slurry containing 0.5 to 3 wt % colloidal silica particles (), the colloidal silica particles containing primary particles, 0.5 to 2 wt % complexing agent () selected from at least one of L-aspartic acid, nitrilotriacetic acid, nitrilotri(methylphosphonic acid), ethylenediamine-N,N-disuccinic acid trisodium salt, and ethylene glycol-bis (2aminoethylether)-N,N,N,N-tetraacetic acid, and balance water having a pH of 5 to 9 to create a polishing slurry for the semiconductor substrate. Oxidizing at least a surface portion of the Co.sup.0 to Co.sup.+3 of the semiconductor substrate to prevent runaway dissolution of the Co.sup.0 reduces polishing defects in the semiconductor substrate. Polishing the semiconductor substrate with a polishing pad removes the surface portion of the semiconductor substrate oxidized to Co.sup.+3.

The invention is a method for chemical mechanical polishing a semiconductor substrate having cobalt or cobalt alloy containing features containing Co.sup.0. The method mixes 0.1 to 2 wt % hydrogen peroxide oxidizing agent () into a slurry containing 0.5 to 3 wt % colloidal silica particles (), the colloidal silica particles containing primary particles, 0.5 to 2 wt % complexing agent () selected from at least one of L-aspartic acid, nitrilotriacetic acid, nitrilotri(methylphosphonic acid), ethylenediamine-N,N-disuccinic acid trisodium salt, and ethylene glycol-bis (2aminoethylether)-N,N,N,N-tetraacetic acid, and balance water having a pH of 5 to 9 to create a polishing slurry for the semiconductor substrate. Oxidizing at least a surface portion of the Co.sup.0 to Co.sup.+3 of the semiconductor substrate to prevent runaway dissolution of the Co.sup.0 reduces polishing defects in the semiconductor substrate. Polishing the semiconductor substrate with a polishing pad removes the surface portion of the semiconductor substrate oxidized to Co.sup.+3.