Patent classifications
C23C16/16
Contact structure
A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.
PROCESS FOR THIN FILM DEPOSITION THROUGH CONTROLLED FORMATION OF VAPOR PHASE TRANSIENT SPECIES
A method for deposition of a thin film onto a substrate is provided. The method includes providing a source precursor containing on or more of elements constituting the thin film, generating a transient species from the source precursor, and depositing a thin film onto the substrate from the transient species. The transient species being a reactive intermediate that has a limited lifetime in a condensed phase at or above room temperature.
PROCESS FOR THIN FILM DEPOSITION THROUGH CONTROLLED FORMATION OF VAPOR PHASE TRANSIENT SPECIES
A method for deposition of a thin film onto a substrate is provided. The method includes providing a source precursor containing on or more of elements constituting the thin film, generating a transient species from the source precursor, and depositing a thin film onto the substrate from the transient species. The transient species being a reactive intermediate that has a limited lifetime in a condensed phase at or above room temperature.
METHOD AND APPARATUS FOR FORMING RUTHENIUM SILICIDE FILM ON SURFACE OF SUBSTRATE
A method of forming a ruthenium silicide film on a surface of a substrate includes: forming a ruthenium film to cover a diffusion layer by supplying a gas containing a ruthenium compound to the surface of the substrate where the diffusion layer is exposed; and forming the ruthenium silicide film including Ru.sub.2Si.sub.3 by siliciding the ruthenium film by supplying a gas containing a silicon compound to the substrate while heating the substrate to a temperature within a range of 420 degrees C. or higher and lower than 500 degrees C.
METHOD AND APPARATUS FOR FORMING RUTHENIUM SILICIDE FILM ON SURFACE OF SUBSTRATE
A method of forming a ruthenium silicide film on a surface of a substrate includes: forming a ruthenium film to cover a diffusion layer by supplying a gas containing a ruthenium compound to the surface of the substrate where the diffusion layer is exposed; and forming the ruthenium silicide film including Ru.sub.2Si.sub.3 by siliciding the ruthenium film by supplying a gas containing a silicon compound to the substrate while heating the substrate to a temperature within a range of 420 degrees C. or higher and lower than 500 degrees C.
Cobalt precursors
Cobalt precursors are described, having application for vapor deposition of cobalt on substrates, such as in atomic layer deposition (ALD) and chemical vapor deposition (CVD) processes for forming interconnects, capping structures, and bulk cobalt conductors, in the manufacture of integrated circuitry and thin film products.
Cobalt precursors
Cobalt precursors are described, having application for vapor deposition of cobalt on substrates, such as in atomic layer deposition (ALD) and chemical vapor deposition (CVD) processes for forming interconnects, capping structures, and bulk cobalt conductors, in the manufacture of integrated circuitry and thin film products.
METHOD FOR MANUFACTURING MOLYBDENUM-CONTAINING THIN FILM AND MOLYBDENUM-CONTAINING THIN FILM MANUFACTURED THEREBY
The present invention provides a method for manufacturing a molybdenum-containing thin film and a molybdenum-containing thin film manufactured thereby. By using a molybdenum (0)-based hydrocarbon compound and a predetermined reaction gas, the method for manufacturing a molybdenum-containing thin film according to the present invention enables easy manufacturing of a highly pure thin film in a simple process.
Ultrathin multilayer metal alloy liner for nano Cu interconnects
Compositions of matter, compounds, articles of manufacture and processes to reduce or substantially eliminate EM and/or stress migration, and/or TDDB in copper interconnects in microelectronic devices and circuits, especially a metal liner around copper interconnects comprise an ultra thin layer or layers of Mn alloys containing at least one of W and/or Co on the metal liner. This novel alloy provides EM and/or stress migration resistance, and/or TDDB resistance in these copper interconnects, comparable to thicker layers of other alloys found in substantially larger circuits and allows the miniaturization of the circuit without having to use thicker EM and/or TDDB resistant alloys previously used thereby enhancing the miniaturization, i.e., these novel alloy layers can be miniaturized along with the circuit and provide substantially the same EM and/or TDDB resistance as thicker layers of different alloy materials previously used that lose some of their EM and/or TDDB resistance when used as thinner layers.
Ultrathin multilayer metal alloy liner for nano Cu interconnects
Compositions of matter, compounds, articles of manufacture and processes to reduce or substantially eliminate EM and/or stress migration, and/or TDDB in copper interconnects in microelectronic devices and circuits, especially a metal liner around copper interconnects comprise an ultra thin layer or layers of Mn alloys containing at least one of W and/or Co on the metal liner. This novel alloy provides EM and/or stress migration resistance, and/or TDDB resistance in these copper interconnects, comparable to thicker layers of other alloys found in substantially larger circuits and allows the miniaturization of the circuit without having to use thicker EM and/or TDDB resistant alloys previously used thereby enhancing the miniaturization, i.e., these novel alloy layers can be miniaturized along with the circuit and provide substantially the same EM and/or TDDB resistance as thicker layers of different alloy materials previously used that lose some of their EM and/or TDDB resistance when used as thinner layers.