Patent classifications
C23C16/28
Silicon-germanium heterostructures with quantum wells having oscillatory germanium concentration profiles for increased valley splitting
Semiconductor heterostructures, methods of making the heterostructures, and quantum dots and quantum computation devices based on the heterostructures are provided. The heterostructures include a quantum well of strained silicon seeded with a relatively low concentration of germanium impurities disposed between two quantum barriers of germanium or a silicon-germanium alloy. The quantum wells are characterized in that the germanium concentration in the wells has an oscillating profile that increases the valley splitting in the conduction band of the silicon quantum well.
METHOD OF DEPOSITING EPITAXIAL MATERIAL, STRUCTURE FORMED USING THE METHOD, AND SYSTEM FOR PERFORMING THE METHOD
A method of depositing one or more epitaxial material layers, a device structure formed using the method and a system for performing the method are disclosed. Exemplary methods include coating a surface of a reaction chamber with a precoat material, processing a number of substrates, and then cleaning the reaction chamber.
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH COMPOSITE CONTACT STRUCTURE
The present application discloses a method for fabricating a semiconductor device. The method includes forming a first dielectric layer on a substrate; forming an expanded hole in the first dielectric layer; conformally forming an adhesive layer in the expanded hole by a first chemical vapor deposition process; conformally forming a first conductive layer on the adhesive layer by a second chemical vapor deposition process; and forming a first conductive structure on the first conductive layer by a third chemical vapor deposition process. The adhesive layer, the first conductive layer, and the first conductive structure together configure a composite contact structure. The second chemical vapor deposition process includes an initial deposition step and subsequent deposition cycles repeated until the first conductive layer is formed to a predetermined thickness
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH COMPOSITE CONTACT STRUCTURE
The present application discloses a method for fabricating a semiconductor device. The method includes forming a first dielectric layer on a substrate; forming an expanded hole in the first dielectric layer; conformally forming an adhesive layer in the expanded hole by a first chemical vapor deposition process; conformally forming a first conductive layer on the adhesive layer by a second chemical vapor deposition process; and forming a first conductive structure on the first conductive layer by a third chemical vapor deposition process. The adhesive layer, the first conductive layer, and the first conductive structure together configure a composite contact structure. The second chemical vapor deposition process includes an initial deposition step and subsequent deposition cycles repeated until the first conductive layer is formed to a predetermined thickness
FLUID-ASSISTED THERMAL MANAGEMENT OF EVAPORATION SOURCES
In various embodiments, evaporation sources for deposition systems are heated and/or cooled via a fluid-based thermal management system.
FLUID-ASSISTED THERMAL MANAGEMENT OF EVAPORATION SOURCES
In various embodiments, evaporation sources for deposition systems are heated and/or cooled via a fluid-based thermal management system.
METHODS OF FORMING TUNGSTEN STRUCTURES
Described are methods for forming a multilayer conductive structure for semiconductor devices. A seed layer is formed comprising a metal and an additional constituent that in combination with the metal inhibits nucleation of a fill layer of the metal formed over the seed layer. Tungsten may be doped or alloyed with silicon to form the seed layer, with a tungsten fill being formed over the seed layer.
METHODS OF FORMING TUNGSTEN STRUCTURES
Described are methods for forming a multilayer conductive structure for semiconductor devices. A seed layer is formed comprising a metal and an additional constituent that in combination with the metal inhibits nucleation of a fill layer of the metal formed over the seed layer. Tungsten may be doped or alloyed with silicon to form the seed layer, with a tungsten fill being formed over the seed layer.
HIGH BORON-CONTENT HARD MASK MATERIALS
An exemplary method may include delivering a boron-containing precursor to a processing region of a semiconductor processing chamber. The method may also include forming a plasma within the processing region of the semiconductor processing chamber from the boron-containing precursor. The method may further include depositing a boron-containing material on a substrate disposed within the processing region of the semiconductor processing chamber. The boron-containing material may include greater than 50% of boron. In some embodiments, the boron-containing material may include substantially all boron. In some embodiments, the method may further include delivering at least one of a germanium-containing precursor, an oxygen-containing precursor, a silicon-containing precursor, a phosphorus-containing precursor, a carbon-containing precursor, and/or a nitrogen-containing precursor to the processing region of the semiconductor processing chamber. The boron-containing material may further include at least one of germanium, oxygen, silicon, phosphorus, carbon, and/or nitrogen.
HIGH BORON-CONTENT HARD MASK MATERIALS
An exemplary method may include delivering a boron-containing precursor to a processing region of a semiconductor processing chamber. The method may also include forming a plasma within the processing region of the semiconductor processing chamber from the boron-containing precursor. The method may further include depositing a boron-containing material on a substrate disposed within the processing region of the semiconductor processing chamber. The boron-containing material may include greater than 50% of boron. In some embodiments, the boron-containing material may include substantially all boron. In some embodiments, the method may further include delivering at least one of a germanium-containing precursor, an oxygen-containing precursor, a silicon-containing precursor, a phosphorus-containing precursor, a carbon-containing precursor, and/or a nitrogen-containing precursor to the processing region of the semiconductor processing chamber. The boron-containing material may further include at least one of germanium, oxygen, silicon, phosphorus, carbon, and/or nitrogen.