A method of performing electroless electrochemical atomic layer deposition is provided and includes: providing a substrate including an exposed upper metal layer; exposing the substrate to a first precursor solution to create a sacrificial metal monolayer on the exposed upper metal layer via underpotential deposition, where the first precursor solution is an aqueous solution including a reducing agent; subsequent to the forming of the sacrificial metal monolayer, rinsing the substrate; subsequent to the rinsing of the substrate, exposing the substrate to a second precursor solution to replace the sacrificial metal monolayer with a first deposition layer; and subsequent to replacing the sacrificial metal monolayer with the first deposition layer, rinsing the substrate. The exposure of the substrate to the first precursor solution and the exposure of the substrate to the second precursor solution are electroless processes.

A method of performing electroless electrochemical atomic layer deposition is provided and includes: providing a substrate including an exposed upper metal layer; exposing the substrate to a first precursor solution to create a sacrificial metal monolayer on the exposed upper metal layer via underpotential deposition, where the first precursor solution is an aqueous solution including a reducing agent; subsequent to the forming of the sacrificial metal monolayer, rinsing the substrate; subsequent to the rinsing of the substrate, exposing the substrate to a second precursor solution to replace the sacrificial metal monolayer with a first deposition layer; and subsequent to replacing the sacrificial metal monolayer with the first deposition layer, rinsing the substrate. The exposure of the substrate to the first precursor solution and the exposure of the substrate to the second precursor solution are electroless processes.

Disclosed herein are methods comprising: illuminating a first location of an optothermal substrate with electromagnetic radiation; wherein the optothermal substrate converts at least a portion of the electromagnetic radiation into thermal energy; and wherein the optothermal substrate is in thermal contact with a liquid sample comprising a plurality of thermally reducible metal ions; thereby: generating a confinement region at a location in the liquid sample proximate to the first location of the optothermal substrate; trapping at least a portion of the plurality of thermally reducible metal ions within the confinement region; and thermally reducing the trapped portion of the plurality of thermally reducible metal ions; thereby: depositing a metal particle on the optothermal substrate at the first location. Also disclosed herein are systems for performing the methods described herein. Also disclosed herein are patterned substrates made by the methods described herein, and methods of use thereof.

An ink composition including a metal salt amine complex; wherein the metal salt amine complex is formed from a metal salt and an amine; a compound selected from the group consisting of a stable free radical, a photoacid generator, and a thermal acid generator; and an optional solvent. A process including forming a metal salt amine complex; adding a compound selected from the group consisting of a stable free radical, a photoacid generator, and a thermal acid generator to the metal salt amine complex to form an ink. A process forming conductive features on a substrate with the ink composition.

An ink composition including a metal salt amine complex; wherein the metal salt amine complex is formed from a metal salt and an amine; a compound selected from the group consisting of a stable free radical, a photoacid generator, and a thermal acid generator; and an optional solvent. A process including forming a metal salt amine complex; adding a compound selected from the group consisting of a stable free radical, a photoacid generator, and a thermal acid generator to the metal salt amine complex to form an ink. A process forming conductive features on a substrate with the ink composition.

A method of forming nanowires, including the forming on a metal region of a layer having through openings, and the forming in the through openings of portions deposited in a chemical bath, forming all or part of the nanowires and extending from the metal region.

A method of forming nanowires, including the forming on a metal region of a layer having through openings, and the forming in the through openings of portions deposited in a chemical bath, forming all or part of the nanowires and extending from the metal region.

Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some implementations, the methods involve providing a tungsten (W)-containing layer on a substrate; and depositing a molybdenum (Mo)-containing layer on the W-containing layer. In some implementations, the methods involve depositing a Mo-containing layer directly on a dielectric or titanium nitride (TiN) substrate without an intervening W-containing layer.

A versatile, highly scalable single step method is provided for depositing a metallic Pd film from low temperature combustion of an aqueous solution. By using only palladium nitrate and glycine as precursors, water as a solvent, mirror-bright dense Pd films with high crystallinity and good adhesion can be deposited at 250 C. on different substrates without subsequent annealing. The technique can be used to form a reusable catalytic flask as illustrated by the Suzuki-Miyaura cross-coupling reaction, where the Pd film uniformly covers the inner walls of the flask and eliminates the catalyst separation step.

The disclosure is and includes at least an apparatus, system and method for a ramped electrical interconnection for use in semiconductor fabrications. The apparatus, system and method includes at least a first semiconductor substrate having thereon a first electrical circuit comprising first electrical components; a second semiconductor substrate at least partially covering the first electrical circuit, and having thereon a second electrical circuit comprising second electrical components; a ramp formed through the second semiconductor substrate between at least one of the first electrical components and at least one of the second electrical components; and an additively manufactured conductive trace formed on the ramp to electrically connect the at least one first electrical component and the at least one second electrical component.