Patent classifications
C25D5/022
Zinc-cobalt barrier for interface in solder bond applications
A microelectronic device has bump bond structures on input/output (I/O) pads. The bump bond structures include copper-containing pillars, a barrier layer including cobalt and zinc on the copper-containing pillars, and tin-containing solder on the barrier layer. The barrier layer includes 0.1 weight percent to 50 weight percent cobalt and an amount of zinc equivalent to a layer of pure zinc 0.05 microns to 0.5 microns thick. A lead frame has a copper-containing member with a similar barrier layer in an area for a solder joint. Methods of forming the microelectronic device are disclosed.
Method for making cost-effective nickel-63 radiation source for true random number generators
A method for electro-depositing a radioactive material onto a metal substrate is disclosed. This is particularly well-suited for true random number generators. The method includes (a) at least partially masking the metal substrate to expose a metallic surface on the metal substrate; (b) connecting the metal substrate to a cathode of a current source; (c) submersing the exposed metallic surface into a solution containing radioactive metal ions, wherein the solution is connected to an anode of the current source; (d) removing the exposed metallic surface from the solution; (e) removing the solution from the exposed metallic surface; (f) measuring the amount of radioactivity emitted from the exposed metallic surface; and (g) repeating steps (c) through (f) until the amount of radioactivity measured in step (f) is stabilized relative to a previous measurement.
Method for producing a metal decoration on a dial and dial obtained according to this method
A method for producing metal decorations on a curved dial made of insulating material includes forming, by a method of the LIGA-UV type, a mould made of photosensitive resin and of galvanically depositing a layer of at least one metal from the conductive layer in order to form a block substantially reaching the upper surface of the photosensitive resin.
PLATING APPARATUS AND PLATING PROCESS METHOD
A plating apparatus 1000 includes a plating tank 10 and a substrate holder 30. The plating tank includes an anode 11 arranged in an anode chamber 13. The substrate holder is arranged above the anode chamber and configured to hold a substrate Wf as a cathode. The anode has a cylindrical shape extending in a vertical direction. The plating apparatus further includes a gas accumulation portion 60 and a discharge mechanism 70. The gas accumulation portion is disposed in the anode chamber so as to have a space between the anode and the gas accumulation portion. The gas accumulation portion covers an upper end, an outer peripheral surface, and an inner peripheral surface of the anode to accumulate a process gas generated from the anode. The discharge mechanism is configured to discharge the process gas accumulated in the gas accumulation portion to outside of the plating tank.
COPPER ALLOY FILM WITH HIGH STRENGTH AND HIGH CONDUCTIVITY
A method of forming a component can include electrochemically depositing a metallic material onto a carrier component to a thickness of greater than 50 microns. The metallic material can include crystal grains and at least 90% of the crystal grains can include nanotwin boundaries. The metallic material can include a Copper-Silver alloy (Cu—Ag) with between about 0.5-2 at %-Ag.
Metal Circuit Structure Based on FPC and Method of Making the Same
A metal circuit structure based on a flexible printed circuit (FPC) contains: a substrate, a first metal layer attached on the substrate, a second metal layer formed on the first metal layer, and an intermediate layer defined between the first metal layer and the second metal layer. A first surface of the intermediate layer is connected with the first metal layer, and a second surface of the intermediate layer is connected with the second metal layer. The intermediate layer is made of a first material, the second metal layer is made of a second material, and the first material of the intermediate layer does not act with the second material of the second metal layer.
THERMAL COATING OF POWER ELECTRONICS BOARDS FOR THERMAL MANAGEMENT
An apparatus includes a printed circuit board (PCB), a power component disposed on the PCB, the power component to generate heat, and a multilayered coating disposed over the power component and at least a portion of the PCB to dissipate heat from the power component, the multilayered including: an electrical insulation layer comprising a non-polar compound and disposed on the power component and the at least a portion of the PCB; a chromium layer disposed on the electrical insulation layer; and a copper layer disposed on the chromium layer that is at least 10 microns (μm) thick, the copper layer conformally adhered to a top of the power component and to the PCB.
ELECTROFORMING PROCESS
Process of electroforming a metal structure, in particular a structure with a tip protruding from adjacent outer layers. The process comprises the following steps; a first layer is deposited on a substrate followed by one or more next layers partially overlapping the first layer to form an intermediate structure having a substrate surface facing the substrate; in a next step, the intermediate structure is removed from the substrate and one or more further layers are deposited on said substrate surface of the intermediate structure.
Circuit Board Traces in Channels using Electroless and Electroplated Depositions
A circuit layer is formed by drilling vias and forming channels in a circuit layer which has catalytic particles exposed on the surfaces, channels, and vias. A first flash electroless deposition is followed by application of dry film, followed by selective laser ablation of the dry film channels and vias. A second electroless solution is applied which provides additional deposition over the first flash electroless deposition but only on the vias and trace channel areas. An electrodeposition follows, using the first deposition as a cathode. The dry film is stripped and the first electroless layer is etched, leaving only depositions in the channels and vias.
METHOD FOR MANUFACTURING PRINTED WIRING BOARD
A method for manufacturing a printed wiring board includes forming through holes in a double-sided copper-clad laminated plate such that a high-density region of the through holes and a low-density region of the through holes are formed, forming an electrolytic plating film on a copper foil of the plate in the high-density and low-density regions, forming a masking resist to mask the plating film in the high-density region, etching the plating film in the low-density region exposed from the resist such that the plating film in the low-density region is thinned, peeling off the resist from the plating film in the high-density region, and forming a conductor circuit including the copper foil and the plating film in the high-density and low-density regions. The forming of the plating film on the copper foil of the plate includes forming the plating film in the through holes in the high-density and low-density regions.