C30B23/025

Single-crystal silicon carbide and single-crystal silicon carbide wafer

A single-crystal silicon carbide and a single-crystal silicon carbide wafer of good-quality are disclosed that are low in dislocations, micropipes and other crystal defects and enable high yield and high performance when applied to a device, wherein the ratio of doping element concentrations on opposite sides in the direction of crystal growth of the interface between the seed crystal and the grown crystal is 5 or less and the doping element concentration of the grown crystal in the vicinity of the seed crystal is 2×10.sup.19 cm.sup.−3 to 6×10.sup.20 cm.sup.−3.

MANUFACTURING METHOD OF SILICON CARBIDE INGOT
20220049372 · 2022-02-17 · ·

A manufacturing method of a silicon carbide ingot includes the following. A raw material containing carbon and silicon and a seed located above the raw material are provided in a reactor. A first surface of the seed faces the raw material. The reactor and the raw material are heated, where part of the raw material is vaporized and transferred to the first surface of the seed and a sidewall of the seed and forms a silicon carbide material on the seed, to form a growing body containing the seed and the silicon carbide material. The growing body grows along a radial direction of the seed, and the growing body grows along a direction perpendicular to the first surface of the seed. The reactor and the raw material are cooled to obtain a silicon carbide ingot. A diameter of the silicon carbide ingot is greater than a diameter of the seed.

Silicon carbide substrate and method of manufacturing the same

A silicon carbide substrate capable of stably forming a device of excellent performance, and a method of manufacturing the same are provided. A silicon carbide substrate is made of a single crystal of silicon carbide, and has a width of not less than 100 mm, a micropipe density of not more than 7 cm.sup.−2, a threading screw dislocation density of not more than 1×10.sup.4 cm.sup.−2, a threading edge dislocation density of not more than 1×10.sup.4 cm.sup.−2, a basal plane dislocation density of not more than 1×10.sup.4 cm.sup.−2, a stacking fault density of not more than 0.1 cm.sup.−1, a conductive impurity concentration of not less than 1×10.sup.18 cm.sup.−3, a residual impurity concentration of not more than 1×10.sup.16 cm.sup.−3, and a secondary phase inclusion density of not more than 1 cm.sup.−3.

Silicon carbide crystal and method of manufacturing silicon carbide crystal
09725823 · 2017-08-08 · ·

An SiC crystal (10) has Fe concentration not higher than 0.1 ppm and Al concentration not higher than 100 ppm. A method of manufacturing an SiC crystal includes the following steps. SiC powders for polishing are prepared as a first source material (17). A first SiC crystal (11) is grown by sublimating the first source material (17) through heating and precipitating an SiC crystal. A second source material (12) is formed by crushing the first SiC crystal (11). A second SiC crystal (14) is grown by sublimating the second source material (12) through heating and precipitating an SiC crystal. Thus, an SiC crystal and a method of manufacturing an SiC crystal capable of achieving suppressed lowering in quality can be obtained.

Integrated Oxide Device
20220268996 · 2022-08-25 ·

Various embodiments provide for systems and techniques for the successful fabrication of metal oxide (TMO)-on-glass layer stacks via direct deposition. The resulting samples feature epitaxial, strontium titanate (STO) or barium titanate (BTO) films on silicon dioxide (SiO.sub.2) layers, forming STO- or BTO-buffered SiO.sub.2 pseudo-substrates. As the integration of TMO films on silicon rely on an STO or BTO buffer layer, a wide variety of TMO-based integrated devices (e.g., circuits, waveguides, etc.) can be fabricated from the TMO-on-glass platform of the present technology. Moreover, the STO, or the BTO, survives the fabrication process without a corresponding degradation of crystalline quality, as evidenced by various objective measures.

Methods of growing heteroepitaxial single crystal or large grained semiconductor films and devices thereon
09722130 · 2017-08-01 · ·

A method is disclosed for making semiconductor films from a eutectic alloy comprising a metal and a semiconductor. Through heterogeneous nucleation said film is deposited at a deposition temperature on relatively inexpensive buffered substrates, such as glass. Specifically said film is vapor deposited at a fixed temperature in said deposition temperature where said deposition temperature is above a eutectic temperature of said eutectic alloy and below a temperature at which the substrate softens. Such films could have widespread application in photovoltaic and display technologies.

Process of surface treatment for wafer
09719189 · 2017-08-01 · ·

Disclosed is a process of surface treatment of a substrate. The method of treating a surface of a substrate comprises preparing the substrate, and performing an etching process with respect to a surface of the substrate. The etching process comprises a step of introducing etching gas to the surface of the substrate, and the etching gas comprises a halogen compound and a silane compound.

Silicon carbide substrate, semiconductor device, and methods for manufacturing them

A silicon carbide substrate has a first main surface, and a second main surface opposite to the first main surface. A region including at least one main surface of the first and second main surfaces is made of single-crystal silicon carbide. In the one main surface, sulfur atoms are present at not less than 60×10.sup.10 atoms/cm.sup.2 and not more than 2000×10.sup.10 atoms/cm.sup.2, and carbon atoms as an impurity are present at not less than 3 at % and not more than 25 at %. Thereby, a silicon carbide substrate having a stable surface, a semiconductor device using the substrate, and methods for manufacturing them can be provided.

GROUP III NITRIDE SUBSTRATE AND METHOD FOR PRODUCING GROUP III NITRIDE CRYSTAL
20170275780 · 2017-09-28 ·

A Group III nitride substrate contains a base material part of a Group III nitride having a front surface and a back surface, the front surface of the base material part and the back surface of the base material part having different Mg concentrations from each other.

Use of freestanding nitride veneers in semiconductor devices

Thin freestanding nitride veneers can be used for the fabrication of semiconductor devices. These veneers are typically less than 100 microns thick. The use of thin veneers also eliminates the need for subsequent wafer thinning for improved thermal performance and 3D packaging.