Disclosed is a method of forming a conductive diamond layer on a surface of a carbon fibre substrate that is used as a component of an electrode for neural stimulation and/or electrochemical sensing. The method comprises functionalising at least a portion of the surface with a functionalising agent to facilitate coating the surface with the conductive diamond layer. The method also comprises providing a diamond precursor and depositing the diamond precursor over the functionalising agent to form the conductive diamond layer. The disclosure also relates to an electrode that is used as a component of an electrode for neural stimulation and/or electrochemical sensing.

A method includes positioning a designated rectangular single crystal diamond seed in a diamond growth reactor, the designated single crystal diamond seed having a (001) plane, with the edges being (001) planes and corners are pointed in the <110> direction, positioning a pair of blocking seeds on opposite edges of the designated seed, and growing diamond of the designated seed and blocking seeds, wherein lateral single crystal growth occurs laterally from the designated seed.

A method includes positioning a designated rectangular single crystal diamond seed in a diamond growth reactor, the designated single crystal diamond seed having a (001) plane, with the edges being (001) planes and corners are pointed in the <110> direction, positioning a pair of blocking seeds on opposite edges of the designated seed, and growing diamond of the designated seed and blocking seeds, wherein lateral single crystal growth occurs laterally from the designated seed.

A deposition mask in which deformation of long sides is restrained is manufactured. A manufacturing method of a deposition mask includes a step of preparing a metal plate; a processing step of processing the metal plate into an intermediate product comprising: a plurality of deposition mask portions each including a pair of long sides and a pair of short sides, and having a plurality of through-holes formed therein; and a support portion that surrounds the plurality of deposition mask portions, and is partially connected to the short sides of the plurality of deposition mask portions; and a separation step of separating the deposition mask portions from the support portion to obtain the deposition mask. In the intermediate product, the long sides of the deposition mask portions are not connected to the support portion.

A deposition mask in which deformation of long sides is restrained is manufactured. A manufacturing method of a deposition mask includes a step of preparing a metal plate; a processing step of processing the metal plate into an intermediate product comprising: a plurality of deposition mask portions each including a pair of long sides and a pair of short sides, and having a plurality of through-holes formed therein; and a support portion that surrounds the plurality of deposition mask portions, and is partially connected to the short sides of the plurality of deposition mask portions; and a separation step of separating the deposition mask portions from the support portion to obtain the deposition mask. In the intermediate product, the long sides of the deposition mask portions are not connected to the support portion.

A crystal growth method of the present disclosure includes: preparing a crystal growth-derived-layer forming substrate including (a) a substrate having a surface layer, (b) a mask pattern which is formed on the surface layer and which includes a plurality of strip bodies, and (c) a plurality of crystal growth-derived layers which are formed between and on the plurality of stripe bodies so as to have gaps therebetween above the plurality of strip bodies and which differ in lattice constant from the substrate having the surface layer; and growing semiconductor layers on the plurality of crystal growth-derived layers. The semiconductor layers are respectively grown on the plurality of crystal growth-derived layers formed so as to be separated from each other, and semiconductor layers on two adjacent ones of the plurality of crystal growth-derived layers are separated from each other.

A crystal growth method of the present disclosure includes: preparing a crystal growth-derived-layer forming substrate including (a) a substrate having a surface layer, (b) a mask pattern which is formed on the surface layer and which includes a plurality of strip bodies, and (c) a plurality of crystal growth-derived layers which are formed between and on the plurality of stripe bodies so as to have gaps therebetween above the plurality of strip bodies and which differ in lattice constant from the substrate having the surface layer; and growing semiconductor layers on the plurality of crystal growth-derived layers. The semiconductor layers are respectively grown on the plurality of crystal growth-derived layers formed so as to be separated from each other, and semiconductor layers on two adjacent ones of the plurality of crystal growth-derived layers are separated from each other.

A semiconductor laminate at least including: a base; a buffer layer; and a crystalline metal oxide semiconductor film containing at least one metal element and having a corundum structure, the semiconductor laminate having the buffer layer on a main surface of the base directly or via another layer, the semiconductor laminate having the crystalline metal oxide semiconductor film on the buffer layer. The buffer layer is a laminate structure of a plurality of buffer films each with a different composition, and at least two buffer films of the plurality of buffer films have a film thickness of 200 nm or more and 650 nm or less.

A semiconductor laminate at least including: a base; a buffer layer; and a crystalline metal oxide semiconductor film containing at least one metal element and having a corundum structure, the semiconductor laminate having the buffer layer on a main surface of the base directly or via another layer, the semiconductor laminate having the crystalline metal oxide semiconductor film on the buffer layer. The buffer layer is a laminate structure of a plurality of buffer films each with a different composition, and at least two buffer films of the plurality of buffer films have a film thickness of 200 nm or more and 650 nm or less.

A vertical fin-based field effect transistor (FinFET) device includes an array of FinFETs comprising a plurality of rows and columns of separated fins. Each of the separated fins has a length and a width measured laterally with respect to the length and includes a first fin tip disposed at a first end of the separated fin, a second fin tip disposed at a second end of the separated fin opposing the first end, a central region disposed between the first fin tip and the second fin tip and characterized by a first electrical conductivity, and a source contact electrically coupled to the central region. The first fin tip and the second fin tip are characterized by a second electrical conductivity less than the first electrical conductivity. The FinFET further includes a first gate region surrounding the first fin tip and a second gate region surrounding the second fin tip.