Patent classifications
C30B25/18
NANOCOMPOSITE-SEEDED EPITAXIAL GROWTH OF SINGLE-DOMAIN LITHIUM NIOBATE THIN FILMS FOR SURFACE ACOUSTIC WAVE DEVICES
A method for making LNO film, including the steps of identifying a substrate, identifying a deposition target, placing the substrate and deposition target in a deposition environment, evolving target material into the deposition environment, and depositing evolved target material onto the substrate to yield an LNO film. The deposition environment defines a temperature of between 500 degrees Celsius and 750 degrees Celsius and a pressure of about 10.sup.−6 Torr. A seed or buffer layer may be first deposited onto the substrate, wherein the seed layer is about 30 mole percent gold and about 70 LiNbO.sub.3.
IN-SITU AND SELECTIVE AREA ETCHING OF SURFACES OR LAYERS, AND HIGH-SPEED GROWTH OF GALLIUM NITRIDE, BY ORGANOMETALLIC CHLORINE PRECURSORS
Methods and systems for in-situ and selective area etching of surfaces or layers, and high-speed growth of gallium nitride (GaN), by organometallic chlorine (Cl) precursors, are described herein. In one aspect, a method can include exposing a GaN layer or surface to an organometallic Cl precursor within a reactor under conditions sufficient to etch the layer or surface, thereby etching the GaN layer or surface. In another aspect, a method of growing GaN can include inputting a set of reactants comprising at least trimethylgallium (TMGa) and anunonia into an OMVPE reactor; inputting an organometallic Cl precursor into the OMVPE reactor; and reacting the Cl precursor with the TM Ga and with the NH3 to deposit GaN by organometallic vapor phase epitaxy.
Wafer Carrier and Method
A wafer carrier includes a pocket sized and shaped to accommodate a wafer, the pocket having a base and a substantially circular perimeter, and a removable orientation marker, the removable orientation marker comprising an outer surface and an inner surface, the outer surface having an arcuate form sized and shaped to mate with the substantially circular perimeter of the pocket, and the inner surface comprising a flat face, wherein the removable orientation marker further comprises a notch at a first end of the flat face.
Wafer Carrier and Method
A wafer carrier includes a pocket sized and shaped to accommodate a wafer, the pocket having a base and a substantially circular perimeter, and a removable orientation marker, the removable orientation marker comprising an outer surface and an inner surface, the outer surface having an arcuate form sized and shaped to mate with the substantially circular perimeter of the pocket, and the inner surface comprising a flat face, wherein the removable orientation marker further comprises a notch at a first end of the flat face.
Controlled homo-epitaxial growth of hybrid perovskites
Organic-inorganic hybrid perovskite has demonstrated tremendous potential for the next generation of electronic and optoelectronic devices due to their remarkable carrier dynamics. However, current studies of electronic and optoelectronic devices have been focused on polycrystalline materials, due to the challenges in synthesizing device compatible high quality single crystalline materials. Here, we firstly report the epitaxial growth of single crystal hybrid perovskites with controlled locations, morphologies, and orientations, using combined strategies of lithography, homoepitaxy, and low temperature solution method. The crystals grow following a layer-by-layer model under controlled growth parameters. The process is robust and can be readily scaled up. The as-grown epitaxial single crystals were integrated in an array of light emitting diodes, each crystal as a pixel with enhanced quantum efficiencies. This capability opens up new opportunities for designing and fabricating a diverse range of high performance electronic and optoelectronic devices using crystalline hybrid perovskites.
Controlled homo-epitaxial growth of hybrid perovskites
Organic-inorganic hybrid perovskite has demonstrated tremendous potential for the next generation of electronic and optoelectronic devices due to their remarkable carrier dynamics. However, current studies of electronic and optoelectronic devices have been focused on polycrystalline materials, due to the challenges in synthesizing device compatible high quality single crystalline materials. Here, we firstly report the epitaxial growth of single crystal hybrid perovskites with controlled locations, morphologies, and orientations, using combined strategies of lithography, homoepitaxy, and low temperature solution method. The crystals grow following a layer-by-layer model under controlled growth parameters. The process is robust and can be readily scaled up. The as-grown epitaxial single crystals were integrated in an array of light emitting diodes, each crystal as a pixel with enhanced quantum efficiencies. This capability opens up new opportunities for designing and fabricating a diverse range of high performance electronic and optoelectronic devices using crystalline hybrid perovskites.
Protective diamond coating system and method
Disclosed herein is system and method for protective diamond coatings. The method may include the steps of cleaning and seeding a substrate, depositing a crystalline diamond layer on the substrate, etching the substrate; and attaching the substrate to protected matter. The crystalline diamond layer may reflect at least 28 percent of electromagnetic energy in a beam having a bandwidth of 800 nanometer to 1 micrometer.
Metal sulfide filled carbon nanotubes and synthesis methods thereof
Filled carbon nanotubes (CNTs) and methods of synthesizing the same are provided. An in situ chemical vapor deposition technique can be used to synthesize CNTs filled with metal sulfide nanowires. The CNTs can be completely and continuously filled with the metal sulfide fillers up to several micrometers in length. The filled CNTs can be easily collected from the substrates used for synthesis using a simple ultrasonication method.
METHOD AND APPARATUS FOR LOW TEMPERATURE SELECTIVE EPITAXY IN A DEEP TRENCH
Embodiments of the present disclosure generally relate to methods for forming epitaxial layers on a semiconductor device. In one or more embodiments, methods include removing oxides from a substrate surface during a cleaning process, flowing a processing reagent containing a silicon source and exposing the substrate to the processing reagent during an epitaxy process, and stopping the flow of the processing reagent. The method also includes flowing a purging gas and pumping residues from the processing system, stopping the flow of the purge gas, flowing an etching gas and exposing the substrate to the etching gas. The etching gas contains hydrogen chloride and at least one germanium and/or chlorine compound. The method further includes stopping the flow of the at least one compound while continuing the flow of the hydrogen chloride and exposing the substrate to the hydrogen chloride and stopping the flow of the hydrogen chloride.
III NITRIDE SEMICONDUCTOR WAFERS
A III-nitride-based semiconductor wafer is provided that includes a substrate with a central region and a peripheral edge region. One or more intermediate layers may be optionally provided selected from a buffer layer, a seed layer, or a transition layer. A peripheral edge feature is formed in or on a peripheral edge region of the substrate or the transition layer, with one or more peripheral edge passivation layers or peripheral edge surface texturing. The peripheral edge feature extends only around the peripheral edge and not in the central region. One or more III-nitride-based layers is positioned over the central region. In the central region, the III-nitride layer is an epitaxial layer while in the peripheral edge region, it is a polycrystalline layer. Stress due to lattice mismatches and differences in the coefficient of thermal expansion between the III-nitride layer and the substrate is relieved, minimizing defects.