The process for manufacturing a product (1) including nanoelements (2) includes: forming (E2) a mixture (6) including a plurality of electrically conductive grains (3), a catalyst (4) separate from the grains (3) of the electrically conductive grains, and a reactant (7) that is liquid or in the form of a suspension of solid particles in a liquid solvent and comprises a precursor of the material intended to form the nanoelements (2); introducing the mixture (6) into a chamber of a reactor and pressurizing the reactor to a pressure less than or equal to 1 bar; and obtaining (E3) the product (1) from the mixture (6) comprising a step (E3-1) of growing the nanoelements (2) from the catalyst (4), then combined with the grains (3) of the electrically conductive grains, the growth step (E3-1) being carried out by a step of heat treatment applied to the mixture (6).

A main crucible of molten semiconductor is replenished from a supply crucible maintained such that there are always two phases of solid and liquid semiconductor within the supply crucible. Heat added to melt the solid material results in the solid material changing phase to liquid, but will not result in any significant elevation in temperature of the liquid within the supply crucible. The temperature excursions are advantageously small, being less than that which would cause problems with the formed product. The solid product material acts as a sort of temperature buffer, to maintain the supply liquid temperature automatically and passively at or very near to the phase transition temperature. For silicon, excursions are kept to less than 90 C., and even as small as 50 C. The methods also are useful with germanium. Prior art silicon methods that entirely melt the semiconductor experience excursions exceeding 100 C.

A main crucible of molten semiconductor is replenished from a supply crucible maintained such that there are always two phases of solid and liquid semiconductor within the supply crucible. Heat added to melt the solid material results in the solid material changing phase to liquid, but will not result in any significant elevation in temperature of the liquid within the supply crucible. The temperature excursions are advantageously small, being less than that which would cause problems with the formed product. The solid product material acts as a sort of temperature buffer, to maintain the supply liquid temperature automatically and passively at or very near to the phase transition temperature. For silicon, excursions are kept to less than 90 C., and even as small as 50 C. The methods also are useful with germanium. Prior art silicon methods that entirely melt the semiconductor experience excursions exceeding 100 C.

This invention is about a stretchable crystalline semiconductor nanowire and a preparation method. The stretchable crystalline semiconductor nanowire has a long and thin main body, a diameter of the nanowire is between 20 to 200 nm, and the nanowire has a crystalline inorganic semiconductor structure. The stretchable crystalline semiconductor nanowire has a bending structure having a plurality of stretchable units disposed along an axial direction, and the stretchable units are connected sequentially to form the stretchable crystalline semiconductor nanowire. Since the nanowire and the guided channel cross-section can be effectively adjusted, stripping and transferring onto other flexible substrates can be further performed. The method of preparing a crystalline nanowire having a spring structure has broad prospects in applications related to the fields of flexible electronics and sensors.

This invention is about a stretchable crystalline semiconductor nanowire and a preparation method. The stretchable crystalline semiconductor nanowire has a long and thin main body, a diameter of the nanowire is between 20 to 200 nm, and the nanowire has a crystalline inorganic semiconductor structure. The stretchable crystalline semiconductor nanowire has a bending structure having a plurality of stretchable units disposed along an axial direction, and the stretchable units are connected sequentially to form the stretchable crystalline semiconductor nanowire. Since the nanowire and the guided channel cross-section can be effectively adjusted, stripping and transferring onto other flexible substrates can be further performed. The method of preparing a crystalline nanowire having a spring structure has broad prospects in applications related to the fields of flexible electronics and sensors.

A semiconductor device is provided. The semiconductor device includes a template layer disposed over a substrate and having a trench therein, a buffer structure disposed over a bottom surface of the trench and comprising a metal oxide, a single crystal semiconductor structure disposed within the trench and over the buffer structure and a gate structure disposed over a channel region of the single crystal semiconductor structure.

A semiconductor device is provided. The semiconductor device includes a template layer disposed over a substrate and having a trench therein, a buffer structure disposed over a bottom surface of the trench and comprising a metal oxide, a single crystal semiconductor structure disposed within the trench and over the buffer structure and a gate structure disposed over a channel region of the single crystal semiconductor structure.

Some embodiments include a semiconductor structure having a laminate which has first regions alternating with second regions. The first regions include silicon, and the second regions include germanium. Some embodiments include a method of forming a semiconductor structure. The semiconductor structure may correspond to at least a portion of an active region of a transistor. A first semiconductor material is deposited with a first deposition process. The first semiconductor material includes silicon. The first deposition process is intermittently interrupted to etch a surface of the deposited first semiconductor material and to deposit a second semiconductor material with a second deposition process. The second semiconductor material includes germanium. The semiconductor structure is at least partially crystalline.

Some embodiments include a semiconductor structure having a laminate which has first regions alternating with second regions. The first regions include silicon, and the second regions include germanium. Some embodiments include a method of forming a semiconductor structure. The semiconductor structure may correspond to at least a portion of an active region of a transistor. A first semiconductor material is deposited with a first deposition process. The first semiconductor material includes silicon. The first deposition process is intermittently interrupted to etch a surface of the deposited first semiconductor material and to deposit a second semiconductor material with a second deposition process. The second semiconductor material includes germanium. The semiconductor structure is at least partially crystalline.

A method for fabricating porous wire-in-tube (WiT) nanostructures including forming a first porous core-shell nanostructure, forming a second porous core-shell nanostructure by increasing thickness and porosity of the porous core-shell nanostructure, and forming a porous WiT nanostructure by etching the second porous core-shell nanostructure. Forming the first porous core-shell nanostructure may include forming a porous layer on a semi-conductive core by depositing a first plurality of particles on the semi-conductive core and generating an initial porous semi-conductive core by etching the semi-conductive core simultaneously with forming the porous layer.