A copper heat dissipation material having a satisfactory heat dissipation performance is provided. The copper heat dissipation material has an alloy layer containing at least one metal selected from Cu, Co, Ni, W, P, Zn, Cr, Fe, Sn and Mo on one or both surfaces, in which surface roughness Sz of the one or both surfaces, measured by a laser microscope using laser light of 405 nm in wavelength, is 5 μm or more.

An adapter element (10) for connecting an electronic component (30) to a heat sink element (20), including an insulation layer (15) extending along a main extension plane (HSE), and at least a first web element (11) and a second web element (12), which are arranged next to each other in a direction parallel to the main extension plane (HSE), forming a free area (13), which, in the assembled state, are arranged between the insulating layer (15) and the electronic component (30) in a direction running perpendicular to the main extension plane (HSE), and on whose front sides (18) facing away from the insulating layer (15) the electronic component (30) is arranged in the assembled state, wherein a distance (A) between the first web element (11) and the second web element (12), measured in a plane parallel to the main extension plane (HSE), is smaller than 350 μm.

A power module substrate includes a circuit layer, an aluminum layer arranged on a surface of an insulation layer, and a copper layer laminated on one side of the aluminum layer. The aluminum layer and the copper layer are bonded together by solid phase diffusion bonding.

Provided is a bonded substrate mainly for mounting a power semiconductor in which the reliability to a thermal cycle has been enhanced as compared with a conventional one. In a bonded substrate in which a copper plate is bonded to one or both main surface(s) of a nitride ceramic substrate, a bonding layer consisting of TiN intervenes between the nitride ceramic substrate and the copper plate and is adjacent at least to the copper plate, and an Ag distribution region in which Ag atoms are distributed is set to be present in the copper plate. Preferably, an Ag-rich phase is set to be present discretely at an interface between the bonding layer and the copper plate.

A power semiconductor substrate comprising an insulating planar base, at least one conductor track and at least one contact area as part of the conductor track, wherein a layer of a metallic material is disposed on the contact area by means of pressure sintering. The associated method comprises the steps of: producing a power semiconductor substrate that includes a planar insulating base, conductor tracks and contact areas; arranging a pasty layer, composed of a metallic material and a solvent, on at least one contact area of the power semiconductor substrate; and applying pressure to the pasty layer.

A copper/ceramic bonded body includes: a copper member made of copper or a copper alloy; and a ceramic member made of a silicon nitride, wherein the copper member and the ceramic member are bonded to each other, a magnesium oxide layer is provided on a ceramic member side of a bonded interface between the copper member and the ceramic member, a Mg solid solution layer is provided between the magnesium oxide layer and the copper member and contains Mg in a state of a solid solution in a Cu primary phase, and a magnesium nitride phase is present on a magnesium oxide layer side of the Mg solid solution layer.

A multilayer electronic component according to some embodiments of the present disclosure includes: a body including a dielectric layer and an internal electrode alternately disposed with the dielectric layer; and an external electrode disposed on the body, wherein a ratio of the number of dielectric grains having a size of 100 to 250 nm included in the dielectric layer is 55% or more with respect to a total number of the dielectric grains included in the dielectric layer.

A method is provided for producing an insulating circuit substrate with a heat sink including an insulating circuit substrate and a heat sink, the insulating circuit substrate including a circuit layer and a metal layer that are formed on an insulating layer, and the heat sink being bonded to the metal layer side. The method includes: an aluminum bonding layer forming step of forming an aluminum bonding layer formed of aluminum or an aluminum alloy having a solidus temperature of 650° C. or lower on the metal layer; and a heat sink bonding step of laminating a copper bonding material formed of copper or a copper alloy between the aluminum bonding layer and the heat sink and bonding the aluminum bonding layer, the copper bonding material, and the heat sink to each other by solid phase diffusion bonding.

Provided is a method for manufacturing a circuit board including: (a) preparing a mixture of a metal powder, an anti-sintering agent, and an activator; (b) immersing a dielectric substrate in the mixture; (c) forming a metal-containing layer on the surface of the dielectric substrate by heating the mixture under an inert atmosphere or under a reducing atmosphere; (d) forming a first metal layer on the metal-containing layer by electroless plating and forming a second metal layer thereon by electroplating; and (e) forming a metal pattern on the dielectric substrate, wherein the first metal layer includes Cu, Ni, Co, Au, Pd, or an alloy thereof, the second metal layer includes Cu, Ni, Fe, Co, Cr, Zn, Au, Ag, Pt, Pd, Rh, or an alloy thereof, and the method further includes performing heat treatment at least once after step (c).

Provided is a method for manufacturing a circuit board including: (a) preparing a mixture of a metal powder, an anti-sintering agent, and an activator; (b) immersing a dielectric substrate in the mixture; (c) forming a metal-containing layer on the surface of the dielectric substrate by heating the mixture under an inert atmosphere or under a reducing atmosphere; (d) forming a first metal layer on the metal-containing layer by electroless plating and forming a second metal layer thereon by electroplating; and (e) forming a metal pattern on the dielectric substrate, wherein the first metal layer includes Cu, Ni, Co, Au, Pd, or an alloy thereof, the second metal layer includes Cu, Ni, Fe, Co, Cr, Zn, Au, Ag, Pt, Pd, Rh, or an alloy thereof, and the method further includes performing heat treatment at least once after step (c).