Power module substrate, power module substrate with heatsink, power module, and method for producing power module substrate
09723707 · 2017-08-01
Assignee
Inventors
Cpc classification
Y10T29/49155
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
H05K1/0201
ELECTRICITY
B23K20/02
PERFORMING OPERATIONS; TRANSPORTING
C04B2237/706
CHEMISTRY; METALLURGY
H01L2924/01322
ELECTRICITY
C04B2237/704
CHEMISTRY; METALLURGY
H05K1/18
ELECTRICITY
H01L2224/83192
ELECTRICITY
H01L2924/01322
ELECTRICITY
H01L2224/32225
ELECTRICITY
H01L2924/00
ELECTRICITY
B23K20/2333
PERFORMING OPERATIONS; TRANSPORTING
H01L2924/00
ELECTRICITY
H01L23/3735
ELECTRICITY
International classification
H05K1/09
ELECTRICITY
B23K20/02
PERFORMING OPERATIONS; TRANSPORTING
H01L23/373
ELECTRICITY
H05K3/10
ELECTRICITY
H05K1/18
ELECTRICITY
Abstract
A power module substrate includes a circuit layer, an aluminum layer arranged on a surface of an insulation layer, and a copper layer laminated on one side of the aluminum layer. The aluminum layer and the copper layer are bonded together by solid phase diffusion bonding.
Claims
1. A power module substrate comprising: a ceramic substrate, and a circuit layer formed on a surface of the ceramic substrate, wherein the circuit layer includes an aluminum layer arranged on the surface of the ceramic substrate and, a copper layer laminated on one side of the aluminum layer by solid phase diffusion bonding, wherein a diffusion layer including Cu and Al is formed in a bonding interface between the aluminum layer and the copper layer, wherein the diffusion layer has a structure in which a plurality of intermetallic compounds is laminated along the bonding interface, wherein each of the plurality of intermetallic compounds is formed in a form of a layer, wherein the plurality of intermetallic compounds includes a θ phase, and an η2 phase, and wherein a layer of each phase is arranged in order of the θ phase and the η2 phase from the aluminum layer toward the copper layer.
2. The power module substrate according to claim 1, wherein a bonding interface between the copper layer and the diffusion layer has a configuration in which an oxide is dispersed in the form of a layer along the bonding interface.
3. The power module substrate according to claim 1, wherein a thickness of the copper layer is 0.1 to 6.0 mm.
4. The power module substrate according to claim 1, wherein the aluminum layer is formed by bonding an aluminum plate having a purity of 99.99% by mass or more to the ceramic substrate.
5. The power module substrate according to claim 1, wherein a thickness of the diffusion layer is 1 to 80 μm.
6. The power module substrate according to claim 1, wherein the diffusion layer has a concentration gradient in which the concentration of aluminum atoms lowers gradually and the concentration of copper atoms increases gradually toward the copper layer from the aluminum layer.
7. The power module substrate according to claim 1, wherein the plurality of intermetallic compounds further includes a ζ2 phase, and a layer of the ζ2 phase is formed between the η2 phase and the copper layer.
8. A power module substrate with a heatsink comprising: the power module substrate according to claim 1; and the heatsink bonded to the other side of the power module substrate.
9. The power module substrate with a heatsink according to claim 8, wherein the bonding layer has a concentration gradient in which a concentration of copper atoms gradually decreases and a concentration of aluminum atoms gradually increases from the aluminum layer toward the heatsink.
10. A power module comprising: the power module substrate according to claim 1; and a semiconductor device bonded to the one side of the circuit layer.
11. A method for producing a power module substrate comprising a ceramic substrate and a circuit layer formed on a surface of the ceramic substrate, the method comprises: a circuit layer forming step in which the circuit layer is formed on a surface of the ceramic substrate; wherein the circuit layer forming step comprises: an aluminum layer arranging step in which an aluminum layer is arranged on the surface of the ceramic substrate; and a copper laminating step in which a copper layer is laminated on one side of the aluminum layer after the aluminum layer arranging step, wherein in the copper laminating step, the aluminum layer and the copper layer are bonded together by solid phase diffusion bonding, and a diffusion layer including Cu and Al is formed in a bonding interface between the aluminum layer and the copper layer, wherein the diffusion layer has a structure in which a plurality of intermetallic compounds is laminated along the bonding interface, wherein each of the plurality of intermetallic compounds is formed in a form of a layer, wherein the plurality of intermetallic compounds includes a θ phase, and an η2 phase, and wherein a layer of each phase is arranged in order of the θ phase and the η2 phase from the aluminum layer toward the copper layer.
12. The method for producing a power module substrate according to claim 11, wherein in the copper laminating step, the copper layer is laminated on one side of the aluminum layer, and the aluminum layer and the copper layer are bonded together by solid phase diffusion bonding by maintaining at 400° C. or more to less than 548° C. in a state of pressurizing the aluminum layer and the copper layer at a pressure of 3 to 35 kgf/cm.sup.2.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1)
(2)
(3)
(4)
(5)
EMBODIMENTS OF THE INVENTION
(6) An embodiment of the present invention will be explained below with reference to the accompanying drawings.
(7)
(8) The power module 1 includes the power module substrate with a heatsink 30, and a semiconductor device 3 bonded to one side (upper side in
(9) The solder layer 2 is, for example, Sn—Ag-based, Sn—Cu-based, Sn—In-based, or Sn—Ag—Cu-based solder materials (so-called, lead-free soldering material), and the solder layer 2 bonds the power module substrate with a heatsink 30 and a semiconductor device 3 together.
(10) The semiconductor device 3 is electronic parts including semiconductor, and various semiconductor devices are selected depending on the functionality required. An IGBT device is used in the present embodiment.
(11) The power module substrate with a heatsink 30 includes the power module substrate 10 and a heatsink 31 bonded to the other side (lower side in
(12) As shown in
(13) The ceramic substrate 11 is for preventing electric connection between the circuit layer 12 and the metal layer 13, and is composed of AlN (aluminum nitride) having high insulation properties. The thickness of the ceramic substrate 11 is set to 0.2 to 1.5 mm, and the thickness thereof in the present embodiment is set to 0.635 mm.
(14) The metal layer 13 is formed by bonding a metal plate made of aluminum or aluminum alloy on the second surface (lower surface in
(15) As shown in
(16) As shown in
(17) The copper layer 12B is formed by being bonded to one side (upper side in
(18) In the present embodiment, as shown in
(19) In an interface between these aluminum layer 12A and copper layer 12B, as shown in
(20) The diffusion layer 12C is formed by which aluminum atom in the aluminum layer 12A and copper atom in the copper layer 12B are mutually diffused. The diffusion layer 12C has a concentration gradient in which the concentration of aluminum atoms lowers gradually and the concentration of copper atoms increases gradually toward the copper layer 12B from the aluminum layer 12A.
(21)
(22) In the present embodiment, as shown in
(23) Also, in an interface between the diffusion layer 12C and the copper layer 12B, and oxide 19 is dispersed in the form of a layer along the bonding interface. In addition, the oxide 19 is an aluminum oxide such as alumina (Al.sub.2O.sub.3). As shown in
(24) A heatsink 31 dissipates the heat of the power module substrate 10. The heatsink 31 is desirable to be made of a material having a good thermal conductivity, and in the present embodiment, it is made of A6063 (aluminum alloy). In the heatsink 31, a flow path 32 through which a fluid for cooling flows is provided.
(25) In addition, in the present embodiment, the metal layer 13 of the power module substrate 10 and the heatsink 31 are bonded via a bonding layer 33.
(26) The bonding layer 33 bonds the power module substrate 10 and the heatsink 31 together. In the present embodiment, as shown in
(27) Next, a power module 1, a power module substrate with a heatsink 30, and a power module substrate 10 according to the present embodiment will be explained with reference to
(28) First, as shown in
(29) Next, as shown in
(30) In addition, at the same time, in a case where the copper plate 22B is bonded by solid phase diffusion bonding to one side of the aluminum layer 12A, the copper plate 43 is bonded by solid phase diffusion bonding to the other side of the metal layer 13, and the heatsink 31 is bonded by solid phase diffusion bonding to the other side of the copper plate 43, the preferable heating temperature of the vacuum heating is in the range of less than an eutectic temperature to the eutectic temperature −5° C., and the eutectic temperature is the lowest eutectic temperature among the eutectic temperature of the metal (Al) configuring the aluminum plate 22A and the metal (Cu) configuring the copper plate 22B, the eutectic temperature of the metal (Al) configuring the aluminum plate 23 and the metal (Cu) configuring the copper 43, and the metal (Al—Mg—Si-based) configuring the heatsink 31 and the metal (Cu) configuring the copper 43.
(31) According to the above, the circuit layer 12 including the aluminum layer 12A and the copper layer 12B on laminated one side of the aluminum layer 12A is formed.
(32) In the above manner, the power module substrate with heatsink 30 in which the circuit layer 12 is formed on one side of the ceramic substrate 11 and the power module substrate 10 of the present embodiment can be obtained.
(33) The semiconductor device 3 is mounted on one side (the surface) of the circuit layer 12 via a solder material, and solder joint is carried out at inside a reduction furnace (semiconductor device bonding step S13).
(34) In this manner, the power module 1 according to the present embodiment is produced.
(35) According to the power module substrate with a heatsink 30 and the power module substrate 10 of the present embodiment having the above structure, the circuit layer 12 includes the copper layer 12B, and the semiconductor device 3 is mounted on the copper layer 12B. Thus, compared to the circuit layer composed of aluminum, the heat generated from the semiconductor device 3 is spread in a surface direction in the copper layer 12B included in the circuit layer 12, the heat can be dissipated efficiently to the power module substrate 10. In the power module substrate with a heat sink 30, the heat of the power module substrate 10 can be further dissipated by the heatsink 31.
(36) Furthermore, the aluminum layer 12A, which is made of aluminum having a relatively small deformation resistance, and metal layer 13 are formed on the first surface and the second surface of the ceramic substrate 11, and since the aluminum layer 12A and the metal layer 13 absorb the heat stress caused by the difference in each thermal expansion coefficient between the ceramic substrate 11 and the circuit layer 12, and the ceramic substrate 11 and the metal layer 13 in a case where a heat cycle is performed, a high reliability with respect to the heat cycle can be obtained.
(37) In addition, since the copper layer 12B having relatively high deformation resistance is formed on one side of the aluminum layer 12A, in a case where a power cycle is performed, deformation of the circuit layer 12 can be suppressed, and a high reliability with respect to the power cycle can be obtained.
(38) In addition, in the present embodiment, since the diffusion layer 12C including Cu and Al is formed in between the aluminum layer 12A and the copper layer 12B, Al in the aluminum layer 12A diffuses sufficiently to the copper layer 12B, Cu in the copper layer 12B diffuses sufficiently to the aluminum layer 12A, the aluminum layer 12A and the copper layer 12B are reliably bonded by solid phase diffusion bonding, and the bonding strength can be secured.
(39) In addition, in the bonding interface between the copper layer 12B and the diffusion layer 12C, since the oxide 19 is dispersed in the form of a layer along the bonding interface, an oxide film formed to the aluminum layer 12A is reliably broken, the mutual diffusion between Cu and Al has progressed sufficiently, and the copper layer 12B and the diffusion layer 12C are securely bonded.
(40) In addition, in the present embodiment, since the diffusion layer 12C has a structure in which a plurality of intermetallic compounds is laminated along the bonding interface, the intermetallic compounds, which are brittle, are prevented from growing large. Also, since intermetallic compounds, which are suitable for each composition, are formed in a form of a layer from the copper layer 12B toward the aluminum layer 12A by the result of that Cu in the copper layer 12B and Al in the aluminum layer 12A are diffused mutually, the properties of the bonding interface can be stable.
(41) Specifically, the diffusion layer 12C is formed by being laminated of three intermetallic compounds of θ phase 16, η2 phase 17, and ζ2 phase 18 being arranged in order from the aluminum layer 12A toward the copper layer 12B. Thus, the volume change inside the diffusion layer 12C becomes small, and an internal distortion of the diffusion layer 12C is suppressed.
(42) Furthermore, in the present embodiment, the average crystal particle size of the aluminum layer 12A is 500 μm or more and the average crystal particle size of the copper layer 12B is in a range of 50 to 200 μm, and thus, the average crystal particle sizes of the aluminum layer 12A and the copper layer 1213 are set relatively large. Hence, an excessive distortion or the like is not accumulated in the aluminum layer 12A and the copper layer 12B, and fatigue characteristics are improved. Therefore, in the performance of the heat cycle, the bonding reliability with respect to thermal stress generated between the power module substrate 10 and the heatsink 31 is improved.
(43) Moreover, in the present invention, the average thickness of the diffusion layer 12C is in a range of 1 to 80 μm, more preferably 5 to 80 μm. Thus, the mutual diffusion between Cu and Al progresses sufficiently, the aluminum layer 12A and the copper layer 12B are bonded together firmly, the intermetallic compounds, which are brittle compared to the aluminum layer 12A and the copper layer 12B, can be suppressed from being grown more than necessary, and the properties of the bonding interface becomes stable.
(44) Here, the preferable thickness of the copper layer 12B is 0.1 to 6.0 mm.
(45) By setting the thickness of the copper layer 12B to 0.1 mm or more, the heat from the semiconductor device 3 is spread in the copper layer 12B and is transferred effectively, and the initial thermal resistance when the power cycle is carried out can be reduced. Thus, the reliability with respect to the power cycle can be further increased. In addition, by setting the thickness of the copper layer 12B to 0.6 mm or less, the rigidity of the circuit layer 12 is reduced and the occurrence of cracking in the ceramic substrate 11 can be suppressed when the heat cycle is carried out.
(46) In the power module substrate 10 and the power module 1 using the power module substrate with a heatsink 30 which are described above, the heat generated from the semiconductor device 3 can be dissipated efficiently. Also, an increase in temperature of the semiconductor device 3 is suppressed, the semiconductor device 3 can be operated at a predetermined temperature, and the stability of the operation thereof can be improved.
(47) In addition, in the present embodiment, since the aluminum layer 12A and the copper layer 12B are bonded together by solid phase diffusion bonding, the circuit layer 12 including the aluminum layer 12A, which is formed on one side of the ceramic substrate 11, and the copper layer 12B can be obtained.
(48) In addition, solid phase diffusion bonding is configured by forming the aluminum layer 12A on the first surface of the ceramic substrate 11 and forming the metal layer 13 on the second surface of the ceramic substrate 11, and maintaining the temperature of 400° C. or more to less than 548° C. in a state of pressurizing at a pressure of 3 to 35 kgf/cm.sup.2 with respect to each of: the aluminum layer 12A and the copper plate 22B; the metal layer 13 and the copper plate 43; and the heatsink 31 and the copper plate 43, after arranging the copper plate 22B to one side of the aluminum layer 12A and arranging the copper plate 43 and the heatsink 31 to the other side of the metal layer 13. By such a configuration, solid phase diffusion bonding is carried out by performing solid phase diffusion of copper atoms of the copper plate 22B into the aluminum layer 12A and by performing solid phase diffusion of aluminum atoms of the aluminum layer 12A into the copper plate 22B in a state in which the aluminum layer 12A is sufficiently in close contact with the copper plate 22B, and the copper layer 12B can be reliably formed to one side of the aluminum layer 12A.
(49) Furthermore, by performing solid phase diffusion bonding in this way, an occurrence of gap between the aluminum layer 12A and the copper layer 1213 can be suppressed and the aluminum layer 12A and the copper layer 12B can be bonded together. Thus, a good thermal conductivity and a good electrical conductivity in the bonding interface between the aluminum layer 12A and the copper layer 12B are achieved, and the heat generated from the semiconductor device 3 can be dissipated efficiently to the ceramic substrate 11. Moreover, the diffusion layer 12C is formed in the interface between the aluminum layer 12A and the copper layer 12B which are bonded together by solid phase diffusion bonding. Since the diffusion layer 12C is formed by solid diffusion, the bonding strength is high. Thus, when the heat cycle and the power cycle are performed, peeling of the interfaces does not occur easily and a good bonding state can be maintained, and the thermal conductivity and the electrical conductivity can be maintained.
(50) In addition, solid phase diffusion bonding is performed to each of the sets of the metal layer 13 and the copper plate 43, and the heatsink 31 and the copper plate 43, and the metal layer 13 and the heatsink 31 can be bonded together via the bonding layer 33. Furthermore, since the metal layer 13 and the heatsink 31 are bonded together via the bonding layer 33 along with suppressing an occurrence of a gap between the metal layer 13 and the heatsink 31 by performing solid phase diffusion bonding in the conditions described above, a good thermal conductivity in between the metal layer 13 and the heatsink 31 can be achieved. Furthermore, the metal layer 13 and the heatsink 31 are firmly bonded together by the bonding layer 33, and thus, when the heat cycle and the power cycle are performed, peeling of each of the interfaces between the metal layer 13 and the bonding layer 33, and the heatsink 31 and the bonding layer 33 does not occur easily, a good bonding conditions can be maintained, and the thermal conductivity can be maintained.
(51) In a case where a pressure applied to the aluminum layer 12A and the copper plate 22B is less than 3 kgf/cm.sup.2 when solid phase diffusion bonding is performed, it is difficult to bond the aluminum layer 12A and the copper plate 22B together sufficiently, and it may cause a gap between the aluminum layer 12A and the copper layer 12B. In addition, in a case where a pressure applied thereto exceeds 35 kgf/cm.sup.2, since the applied pressured is too high, cracks may occur to the ceramic substrate 11, and thus, the applied pressure when solid phase diffusion bonding is performed is set to the above range.
(52) In a case where the temperature during performing solid phase diffusion bonding is 400° C. or more, diffusion of aluminum atoms and copper atoms are promoted, and sufficient solid phase diffusion can be performed in a short amount of time. In addition, in a case where the temperature is less than 548° C., a generation of humps in bonding interfaces caused of a generation of a liquid phase between aluminum and copper, and thickness variation can be suppressed. Thus, the preferable temperature of solid phase diffusion bonding is set in a range of 400° C. or more to less than 548° C.
(53) In addition, a more desirable heat treatment temperature during performing solid phase diffusion bonding is in a range of less than an eutectic temperature (not including the eutectic temperature) of the metal (Al) configuring the aluminum plate 22A and the metal (Cu) configuring the copper plate 22B to the eutectic temperature −5° C. When such range of less than the eutectic temperature (not including the eutectic temperature) to the eutectic temperature −5° C. is selected, since a liquid phase is not formed and compounds of aluminum and copper are not generated, a good bonding reliability of solid phase diffusion bonding is achieved, and furthermore, since a diffusion rate during performing solid phase diffusion bonding is fast and solid phase diffusion bonding can be performed in a relatively short time, the more desirable heat treatment temperature is set as described above.
(54) In addition, in a case where there are scratches on the surface on which bonding will be performed when solid phase diffusion bonding is performed, a gap may occur when solid phase diffusion bonding is performed. However, since each of the surfaces on which bonding between the aluminum layer 12A and the copper plate 22B, the metal layer 13 and the copper plate 43, and the heatsink 31 and the copper plate 43 will be performed are removed scratches and are smoothed in advance, and after the above, since solid phase diffusion bonding is performed, the generation of gaps in each of the bonding interfaces is suppressed and bonding can be performed.
(55) Since the semiconductor device 3 is bonded to the copper layer 12B via a solder layer 2, soldering can be performed well comparing to a case of bonding to the circuit layer made of aluminum.
(56) In the present embodiment, since the metal layer 13 and the heatsink 31 are bonded together by solid phase diffusion bonding via the bonding layer 33, and a solder or a grease, which has less thermal conductivity than that of aluminum and copper, is not interposed between the metal layer 13 and the heat sink 31, the thermal conductivity in between the metal layer 13 and the heatsink 31 can be improved.
(57) In addition, since the copper layer 12B and the heatsink 31 can be bonded together at once, the producing cost can be reduced significantly.
(58) Since the power module 1 according to the present embodiment includes the heatsink 31 under the power module substrate 10, the heat generated from the semiconductor device 3 is transmitted to the power module substrate 10, and the heat can be dissipated efficiently via the heatsink 31.
(59) The embodiment of the present invention has been explained as above. However, the present invention is not limited thereto and can be appropriately changed without departing from the technical concept of the present invention.
(60) In addition, the above embodiment has been explained the case where the copper layer and the heatsink are bonded together at once by solid phase diffusion bonding. However, after forming the copper layer by solid phase diffusion bonding, the heatsink can be bonded to the copper layer by solid phase diffusion bonding.
(61) The embodiment has been explained with respect to the case of forming the copper layer by bonding the copper plate to one side of the aluminum layer by solid phase diffusion bonding after forming the aluminum layer on the first surface of the ceramic substrate. However, after bonding the aluminum plate and the copper plate together by solid phase diffusion bonding, the aluminum plate and the copper plate which was bonded together can be bonded to the first surface of the ceramic substrate.
(62) The above embodiment has been explained that the aluminum layer and the metal layer formed on the first surface and the second surface of the ceramic substrate are a rolled sheet of pure aluminum having purity of 99.99%. However, it is not limited thereto, and aluminum having a purity of 99% (2N aluminum), aluminum alloy or the like can be used.
(63) In addition, the above embodiment has been explained the case in which the copper layer is made of an oxygen-free copper. However, it is not limited thereto, and the copper layer can be formed by other copper plates made of a pure copper, a copper alloy or the like.
(64) Furthermore, the embodiment has been explained that the ceramic substrate made of AlN is used as an insulation layer. However, it is not limited thereto, and a ceramic substrate made of Si.sub.3N.sub.4, Al.sub.2O.sub.3 or the like can be used and an insulating resin can be used as an insulation layer.
(65) The above embodiment has been explained that the power module substrate includes the metal layer. However, it may not include the metal layer.
(66) In addition, the above embodiment has been explained that the power module includes the heatsink. However, it may not include the heatsink.
(67) The above embodiment has been explained the case in which the metal layer of the power module substrate and the heatsink are bonded together by solid phase diffusion bonding with interposing the copper plate between them. However, the metal layer and the heatsink can be joint by a solder, a screwing or the like.
EXAMPLES
Example 1
(68) Hereafter, the result of the confirmation experiment (Example 1) which was performed to confirm the effects of the present invention is explained.
(69) Solid phase diffusion bonding was performed in the conditions in Table 1 according to the order described in the flow chart in
(70) In addition, the ceramic substrate was made of AlN, and the substrate having 40×40 mm of size and having 0.635 mm of thickness was used.
(71) The aluminum layer of the circuit layer was made of a rolled sheet of 4N aluminum, and the aluminum layer having 37×37 mm of size and having 0.1 mm of thickness was used.
(72) The copper layer of the circuit layer was made of a rolled sheet of an oxygen-free copper, and the copper layer having 37×37 mm of size and having 0.3 mm of thickness was used.
(73) The metal layer was made of a rolled sheet of 4N aluminum, and the copper layer having 37×37 mm of size and having 1.6 mm of thickness was used.
(74) The bonding layer was formed of a rolled sheet of an oxygen-free copper, and the bonding layer having 37×37 mm of size and having 0.05 mm of thickness was used. The heatsink was made of a rolled sheet of A6063 alloy, and the heatsink having 50×50 mm of size and having 5 mm of thickness was used.
(75) Solid phase diffusion bonding was performed in a condition in which a pressure inside the vacuum heating furnace is in a range of 10.sup.−6 Pa to 10.sup.−3 Pa.
(76) The semiconductor device was IGBT device, and the semiconductor device having 12.5×9.5 mm of size and having 0.25 mm of thickness was used.
(77) <Heat Cycle Test>
(78) Heat cycle test was performed by using a thermal shock testing apparatus TSB-51 manufactured by ESPEC Corporation, the cycles were repeated at −40° C. for 5 minutes and at 125° C. for 5 minutes in liquid phase (Fluorinert) with respect to the samples (power module with a heatsink), and 3000 cycles of the heat cycle were performed.
(79) <Power Cycle Test>
(80) Power cycle test was performed by using a power module with a heatsink produced by bonding bonding wires made of an aluminum alloy along with soldering the IGBT device to the copper layer by using an Sn—Ag—Cu solder. Under a state in which a temperature and a flow rate of a cooling water inside the heatsink are constant, energizing and de-energizing of the IGBT device were adjusted so that one cycle in which a device surface temperature becomes 140° C. in energized state (ON) and the device surface temperature becomes 80° C. in de-energized state (OFF) is repeated every 10 seconds, and the power cycle repeating 100,000 times of this cycle was performed.
(81) A junction rate of the interface between the aluminum layer and the copper layer, and a thermal resistance of the power module with a heatsink were measured in before and after the heat cycle test and before and after the power cycle test.
(82) <Evaluation of the Junction Rate of the Interface Between the Aluminum Layer and the Copper Layer>
(83) With respect to the power module with a heatsink before and after the power cycle test, the junction rate of the interface between the aluminum layer and the copper layer was evaluated using an ultrasonic flaw detection device, and the junction rate was calculated from the calculation formula shown below. Here, the initial bonding area is a target area of bonding at the time before the bonding, that is, the areas of the aluminum layer and the copper layer in the present examples. Since the peeled off part is indicated by a white part in the bonding part in an ultrasonic flaw detection image, the area of the white part is set as a peeled off area.
(Junction rate)={(Initial bonding area)−(Peeled off area)}/(Initial bonding area)
<Evaluation of the Thermal Resistance>
(84) The thermal resistance was measured as follows. A heater chip (semiconductor device) was heated by 100 W of power, and the temperature of the heater chip was measured using a thermocouple. In addition, the temperature of a cooling medium (ethylene glycol:water=9:1) flowing through the heatsink was measured. A value in which the temperature difference between the heat chip and the cooling medium is divided by power was defined as the thermal resistance.
(85) The evaluation results of the above are shown in Table 1.
(86) TABLE-US-00001 TABLE 1 Conditions of Solid Power Cycle Test Heat Cycle Test Diffusion Bonding Before After Before After Loading Temper- Thermal Junction Thermal Junction Thermal Junction Thermal Junction Pressure ature Time Resistance Rate Resistance Rate Resistance Rate Resistance Rate kgf/cm2 ° C. minute ° C./W % ° C./W % ° C./W % ° C./W % Example 1-1 3 480 120 0.320 100 0.321 99.3 0.320 100 0.326 97 Example 1-2 35 480 120 0.320 100 0.322 99.2 0.320 100 0.324 98.1 Example 1-3 9 400 180 0.323 98.6 0.323 98.4 0.322 98.9 0.325 97.3 Example 1-4 9 540 180 0.327 96.3 0.328 96.1 0.320 100 0.332 93.8 Example 1-5 24 540 15 0.320 99.8 0.321 99.5 0.323 98.5 0.336 92.2 Example 1-6 10 540 30 0.325 97.4 0.326 97.1 0.321 99.5 0.330 95.1 Example 1-7 2 520 60 0.320 100 0.323 98.5 0.322 98.8 0.350 85 Example 1-8 40 520 60 0.320 100 0.325 97.3 0.320 100 0.352 83.9 Example 1-9 21 380 240 0.323 98.6 0.327 96.3 0.323 98.6 0.345 87.5 Example 1-10 12 380 5 0.320 100 0.328 96.2 0.320 100 0.355 82.5
(87) In the Examples 1-1 to 1-10, both junction rates after the heat cycle test and after the power cycle test were high, and thus, it was confirmed that the power modules with a heatsink have a high bonding reliability with respect to the power cycle and the heat cycle.
(88) In addition, in the Examples 1-1 to 1-6, both junction rates after the heat cycle test and after the power cycle test were even higher, and thus, it was confirmed that they are the power modules with a heatsink having a further high bonding reliability with respect to the power cycle and the heat cycle.
Example 2
(89) Hereafter, the result of the confirmation experiment (Example 2) which was performed to confirm the effects of the present invention is explained.
(90) Solid phase diffusion bonding was performed in the conditions of: 9 kgf/cm.sup.2 of pressure; 540° C. of temperature; and 180 minutes of holding time, according to the order described in the flow chart in
(91) In addition, the ceramic substrate was made of AlN, and the substrate having 40×40 mm of size and having 0.635 mm of thickness was used.
(92) The aluminum layer of the circuit layer was made of a rolled sheet of 4N aluminum, and size thereof being 37×37 mm, and thickness thereof being 0.6 mm in the Examples 2-1 to 2-7 and being 0.1 mm in the Example 2-8 were used.
(93) The copper layer of the circuit layer was made of a rolled sheet (copper plate) of an oxygen-free copper, the copper layer having 37×37 mm of size was used, and thickness thereof was set to the thickness as shown in Table 2.
(94) The metal layer was made of a rolled sheet of 4N aluminum, and the copper layer having 37×37 mm of size and having 1.6 mm of thickness was used.
(95) The bonding layer was formed of a rolled sheet of an oxygen-free copper, and the bonding layer having 37×37 mm of size and having 0.05 mm of thickness was used. The heatsink was made of a rolled sheet of A6063 alloy, and the heatsink having 50×50 mm of size and having 5 mm of thickness was used.
(96) Solid phase diffusion bonding was performed in a condition in which a pressure inside the vacuum heating furnace is in a range of 10.sup.−6 Pa to 10.sup.−3 Pa.
(97) The semiconductor device was IGBT device, and the semiconductor device having 12.5×9.5 mm of size and having 0.25 mm of thickness was used.
(98) In addition, the following power module with a heatsink was produced as a Conventional Example 1.
(99) First, a copper plate (37×37 mm of size, and 0.3 mm of thickness) made of an oxygen-free copper served as a circuit layer, a ceramic substrate composed of AlN, and a copper plate (37×37 mm of size, and 0.3 mm of thickness) made of an oxygen-free copper served as a metal layer were laminated via a brazing filler metal composed of Ag-27.4% by mass of Cu-2.0% by mass of Ti, the laminated body was installed inside a vacuum heating furnace in 10.sup.−3 Pa of a vacuum atmosphere in a state of pressurizing at 0.5 kgf/cm.sup.2 in a laminating direction, was heated at 850° C. for 10 minutes, was bonded together, and thereby, a power module substrate was produced. Next, the power module substrate and IGBT device (12.5 mm×9.5 mm of size, and 0.25 mm of thickness) were bonded together, a heatsink was bonded thereto, and a power module with a heatsink was produced.
(100) Furthermore, a power module with a heatsink produced by the following means as a Conventional Example 2.
(101) First, an aluminum plate (37×37 mm of size, and 0.4 mm of thickness) served as a circuit layer, a ceramic substrate composed of AlN, and an aluminum plate (37×37 mm of size, and 0.4 mm of thickness) served as a metal layer were laminated via a brazing filler metal composed of Al-10% by mass of Si, the laminated body was installed inside a vacuum heating furnace in a state of pressurizing at 5 kgf/cm.sup.2 in a laminating direction, was heated at 650° C. for 30 minutes, was bonded together, and thereby, a power module substrate was produced. Next, the power module substrate and IGBT device (12.5 mm×9.5 mm of size, and 0.25 mm of thickness) were bonded together, heatsink was bonded thereto, and a power module with a heatsink was produced.
(102) <Heat Cycle Test>
(103) Heat cycle test was performed to the power module substrate with a heatsink in the same way as the Example 1.
(104) A junction rate of the interface between the ceramic substrate and the circuit layer was measured after the heat cycle test.
(105) <Evaluation of the Junction Rate of the Interface Between the Ceramic Substrate and the Circuit Layer>
(106) With respect to the power module with a heatsink after the heat cycle test, the junction rate of the interface between the ceramic substrate and the circuit layer was evaluated using the ultrasonic flaw detection device, and the junction rate was calculated from the calculation formula shown below. Here, the initial bonding area is a target area of bonding at the time before the bonding, that is, the area of the circuit layer in the present examples. Since the peeled off part is indicated by a white part in the bonding part in an ultrasonic flaw detection image, the area of the white part is set as a peeled off area. In addition, in a case where cracks occur in the ceramic substrate in the heat cycle test, the cracks is shown by the white part in an ultrasonic flaw detection image, and the junction rate becomes small. Therefore, the junction rate was evaluated by a total of the peeled off area in the interface thereof and the area of the cracks of the ceramic substrate.
(Junction rate)={(Initial bonding area)−(Peeled off area)}/(Initial bonding area)
<Power Cycle Test>
(107) Power cycle test was performed to the power module substrate with a heatsink the same way as the Example 1.
(108) An initial thermal resistance in the power cycle test and the thermal resistance after power cycle test were measured. The measurement of the thermal resistance was performed in the same way as the Example 1.
(109) The evaluation results of the above are shown in Table 2.
(110) TABLE-US-00002 TABLE 2 Power Cycle Test Heat Cycle Initial Thermal Test Thickness of Thermal Resistance Junction Rate Copper Plate Resistance after Test after Test mm ° C./W ° C./W % Example 2-1 0.1 0.333 0.335 98.9 Example 2-2 0.6 0.315 0.317 96.2 Example 2-3 1.0 0.294 0.296 98.8 Example 2-4 2.0 0.268 0.269 99.5 Example 2-5 3.0 0.245 0.247 96.0 Example 2-6 4.0 0.221 0.224 96.7 Example 2-7 5.0 0.204 0.210 99.3 Example 2-8 0.3 0.335 0.336 97.0 Conventional Thickness of 0.343 0.344 68.3 Example 1 Circuit Layer 0.3 mm Conventional Thickness of 0.355 0.399 96.4 Example 2 Circuit Layer 0.4 mm
(111) In the Conventional Example 1, a rise of the initial thermal resistance of the power cycle test and the thermal resistance after the power cycle test was small. However, cracks were occurred in the ceramic substrate in the heat cycle test, and the junction rate in the interface between the ceramic substrate and the circuit layer was reduced.
(112) In addition, in the Conventional Example 2, the junction rate between the ceramic substrate and the circuit layer after the heat cycle test was high. However, the initial thermal resistance of the power cycle test was large and a rise of the thermal resistance after the power cycle test was also large.
(113) On the other hand, in the Examples 2-1 to 2-8, the initial thermal resistance was small in the power cycle test, a rise of the thermal resistance after the power cycle test was small, and the test result was good. Furthermore, the junction rate in the interface between the ceramic substrate and the aluminum layer (circuit layer) was large, and the test result was good. According to the above, it was confirmed that the Examples 2-1 to 2-8 are the power modules with a heatsink having a high bonding reliability with respect to the load of the power cycle and the heat cycle.
FIELD OF INDUSTRIAL APPLICATION
(114) The present invention can provide a power module substrate suppressing an increase in the thermal resistance when the power cycle is performed thereon, suppressing occurrence of cracks in the ceramic substrate when the heat cycle is performed, and having a high reliability with respect to the power cycle and the heat cycle, a power module substrate with heatsink, a power module, and a method for producing a power module substrate.
DESCRIPTION OF REFERENCE SIGNS
(115) 1: Power module 3: Semiconductor chip 10: Power module substrate 11: Ceramic substrate (Insulation layer) 12: Circuit layer 12A: Aluminum layer 12B: Copper layer 12C: Diffusion layer 13: Metal layer 30: Power module substrate with heatsink 31: Heatsink