Patent classifications
C30B11/12
Nanostructured battery active materials and methods of producing same
Methods for producing nanostructures from copper-based catalysts on porous substrates, particularly silicon nanowires on carbon-based substrates for use as battery active materials, are provided. Related compositions are also described. In addition, novel methods for production of copper-based catalyst particles are provided. Methods for producing nanostructures from catalyst particles that comprise a gold shell and a core that does not include gold are also provided.
Semiconductor Josephson Junction and a Transmon Qubit Related Thereto
The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.
Semiconductor Josephson Junction and a Transmon Qubit Related Thereto
The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.
Manufacturing method for a nanostructured device using a shadow mask
The present disclosure relates to a device and method for forming efficient quantum devices, in particular quantum devices that have not been contaminated in ex-situ processes. In particular the presently disclosed method can be applied for manufacturing of a Josephson junction which is an element in a tunable superconducting qubit. One embodiment relates to a method for in-situ production of a barrier/gap in the surface layer(s) of an elongated nanostructure, the method comprising the steps of providing at least one elongated device nanostructure on a substrate in a vacuum chamber having at least one deposition source, providing at least one elongated shadow nanostructure in said vacuum chamber, and depositing at least a first facet layer on at least a part of the device nanostructure(s) and the shadow nanostructure(s) by means of said deposition source, wherein the deposition source, the device nanostructure and the shadow nanostructure during deposition are arranged such that the shadow nanostructure covers and forms a shadow mask on at least a part of the device nanostructure thereby forming a gap in the first facet layer deposited on the device nanostructure.
Manufacturing method for a nanostructured device using a shadow mask
The present disclosure relates to a device and method for forming efficient quantum devices, in particular quantum devices that have not been contaminated in ex-situ processes. In particular the presently disclosed method can be applied for manufacturing of a Josephson junction which is an element in a tunable superconducting qubit. One embodiment relates to a method for in-situ production of a barrier/gap in the surface layer(s) of an elongated nanostructure, the method comprising the steps of providing at least one elongated device nanostructure on a substrate in a vacuum chamber having at least one deposition source, providing at least one elongated shadow nanostructure in said vacuum chamber, and depositing at least a first facet layer on at least a part of the device nanostructure(s) and the shadow nanostructure(s) by means of said deposition source, wherein the deposition source, the device nanostructure and the shadow nanostructure during deposition are arranged such that the shadow nanostructure covers and forms a shadow mask on at least a part of the device nanostructure thereby forming a gap in the first facet layer deposited on the device nanostructure.
Nanoscale device comprising an elongated crystalline nanostructure
The present disclosure relates to nanoscale device comprising an elongated crystalline nanostructure, such as a nanowire crystal, a nanowhisker crystal or a nanorod crystal, and a method for producing thereof. One embodiment relates to a nanoscale device comprising an elongated crystalline semiconductor nanostructure, such as a nanowire (crystal) or nanowhisker (crystal) or nanorod (crystal), having a plurality of substantially plane side facets, a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets, and a second facet layer of a superconductor material covering at least a part of the first facet layer, the superconductor material of the second facet layer being different from the superconductor material of the first facet layer, wherein the crystalline structure of the semiconductor nanostructure is epitaxially matched with the crystalline structure of the first facet layer on the interface between the two crystalline structures.
Nanoscale device comprising an elongated crystalline nanostructure
The present disclosure relates to nanoscale device comprising an elongated crystalline nanostructure, such as a nanowire crystal, a nanowhisker crystal or a nanorod crystal, and a method for producing thereof. One embodiment relates to a nanoscale device comprising an elongated crystalline semiconductor nanostructure, such as a nanowire (crystal) or nanowhisker (crystal) or nanorod (crystal), having a plurality of substantially plane side facets, a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets, and a second facet layer of a superconductor material covering at least a part of the first facet layer, the superconductor material of the second facet layer being different from the superconductor material of the first facet layer, wherein the crystalline structure of the semiconductor nanostructure is epitaxially matched with the crystalline structure of the first facet layer on the interface between the two crystalline structures.
Nanostructured Battery Active Materials and Methods of Producing Same
Methods for producing nanostructures from copper-based catalysts on porous substrates, particularly silicon nanowires on carbon-based substrates for use as battery active materials, are provided. Related compositions are also described. In addition, novel methods for production of copper-based catalyst particles are provided. Methods for producing nanostructures from catalyst particles that comprise a gold shell and a core that does not include gold are also provided.
Nanostructured Battery Active Materials and Methods of Producing Same
Methods for producing nanostructures from copper-based catalysts on porous substrates, particularly silicon nanowires on carbon-based substrates for use as battery active materials, are provided. Related compositions are also described. In addition, novel methods for production of copper-based catalyst particles are provided. Methods for producing nanostructures from catalyst particles that comprise a gold shell and a core that does not include gold are also provided.
Synthesis of metal oxide surfaces and interfaces with crystallographic control using solid-liquid-vapor etching and vapor-liquid-solid growth
The present invention provides integrated nanostructures comprising a single-crystalline matrix of a material A containing aligned, single-crystalline nanowires of a material B, with well-defined crystallographic interfaces are disclosed. The nanocomposite is fabricated by utilizing metal nanodroplets in two subsequent catalytic steps: solid-liquid-vapor etching, followed by vapor-liquid-solid growth. The first etching step produces pores, or negative nanowires within a single-crystalline matrix, which share a unique crystallographic direction, and are therefore aligned with respect to one another. Further, since they are contained within a single, crystalline, matrix, their size and spacing can be controlled by their interacting strain fields, and the array is easily manipulated as a single entityaddressing a great challenge to the integration of freestanding nanowires into functional materials. In the second, growth, step, the same metal nanoparticles are used to fill the pores with single-crystalline nanowires, which similarly to the negative nanowires have unique growth directions, and well-defined sizes and spacings. The two parts of this composite behave synergistically, since this nanowire-filled matrix contains a dense array of well-defined crystallographic interfaces, in which both the matrix and nanowire materials convey functionality to the material. The material of either one of these components may be chosen from a vast library of any material able to form a eutectic alloy with the metal in question, including but not limited to every material thus far grown in nanowire form using the ubiquitous vapor-liquid-solid approach. This has profound implications for the fabrication of any material intended to contain a functional interface, since high interfacial areas and high quality interfacial structure should be expected. Technologies to which this simple approach could be applied include but are not limited to p-n junctions of solar cells, battery electrode arrays, multiferroic materials, and plasmonic materials.