A method for fabricating a transparent conductive oxide thin film, the method comprising the following steps: fabricating Ba.sub.1-xLa.sub.xSnO.sub.3 using a solid-phase reaction method to obtain a BLSO magnetron sputtering target material; and fabricating a BLSO thin film by means of direct deposition with argon as a sputtering gas by using a SrTiO.sub.3, MgO, LaAlO.sub.3, (La,Sr)(Al,Ta)O.sub.3(LSAT), MgAl.sub.2O.sub.4 or Al.sub.2O.sub.3 single crystal substrate and the BLSO magnetron sputtering target material, such that the transparent conductive oxide thin film is fabricate is provided. During sputtering, the temperature of the substrate is 750 C.-950 C., and the deposition pressure of the Ar gas is 25-77 Pa. The room-temperature mobility of the transparent conductive oxide thin film can reach 115 cm.sup.2/V.Math.s, the room-temperature carrier concentration can reach 1.210.sup.21 cm.sup.3, and the room-temperature conductivity can reach 14,000 S/cm.

An SiC volume monocrystal is processed by sublimation growth. An SiC seed crystal is placed in a crystal growth region of a growing crucible and SiC source material is introduced into an SiC storage region. During growth, at a growth temperature of up to 2,400 C. and a growth pressure between 0.1 mbar and 100 mbar, an SiC growth gas phase is generated by sublimation of the SiC source material and by transport of the sublimated gaseous components into the crystal growth region, where an SiC volume monocrystal grows by deposition from the SiC growth gas phase on the SiC seed crystal. A mechanical stress is introduced into the SiC seed crystal at room temperature prior to the start of the growth to cause seed screw dislocations present in the SiC seed crystal to undergo a dislocation movement so that seed screw dislocations recombine.

A system for simultaneously manufacturing more than one single crystal of a semiconductor material by physical vapor transport (PVT) includes a plurality of reactors and a common vacuum channel connecting at least a pair of reactors of the plurality of reactors. Each reactor has an inner chamber adapted to accommodate a PVT growth structure for growth of a single semiconductor crystal. The common vacuum channel is connectable to a vacuum pump system for creating and/or controlling a common gas phase condition in the inner chambers of the pair of reactors.

Various embodiments of the present technology enable growth of a-axis oriented barium titanate (BTO) films by inserting a relaxed strain control layer having a larger lattice constant than the c-axis of BTO and a similar thermal expansion mismatch. As a result, in-plane tensile stress causes BTO to grow with its ferroelectric polarization in-plane. Some embodiments allow for BTO films to immediately be grown on silicon with a-axis orientation, and without the need to create thick layers for relaxation. Using various embodiments of the present technology, the BTO can be grown in-plane with minimal dislocation density that is confined to the interface region.

A method for manufacturing a SiC single crystal having a growth container surrounded by a heat-insulating material, a seed crystal substrate disposed inside a top at a center of the container, a silicon carbide raw material disposed at a bottom of the container to sublimate and grow a SiC crystal to allow a center of the hole to deviate from a center position of the seed substrate to a position on a periphery side, a SiC substrate having a main surface tilted from a {0001} plane wherein a basal plane is used and grown with the seed substrate so that a direction of a component of a normal vector of the basal plane of the seed substrate parallel to the main surface and an eccentric direction of the hole are opposite directions in a cross-sectional view including the center of the seed substrate and the center of the hole.

A method of fabricating low dimensional nanostructures on a growth substrate, a single-crystalline low dimensional nanostructure, and a device comprising one or more single-crystalline low dimensional nanostructures. The method comprises fabricating low dimensional nanostructures on a growth substrate using physical vapor deposition, PVD, in a vacuum chamber wherein the low dimensional nanostructures are formed as a strain relief mechanism promoted by a similarity of crystal structure 2-dimensional symmetry between the growth substrate and the low dimensional nanostructures to be grown and a lattice mismatch between the growth substrate and the low dimensional nanostructures to be grown.

An industrially useful p-type oxide semiconductor with an enhanced semiconductor characteristic and a method of forming the p-type oxide semiconductor is provided. By using a metal oxide (for example, iridium oxide) gas as a raw material and conducting a crystal growth on a base with a corundum structure (for example, a sapphire substrate) until a film thickness to be equal to or more than 50 nm, a p-type oxide semiconductor film with a corundum structure includes a film thickness of equal to or more than 50 nm and a surface roughness of equal to or less than 10 nm is obtained.

A device of manufacturing a silicon carbide single crystal includes a crucible, a first resistive heater, a second resistive heater, and a first support portion. The crucible has a top surface, a bottom surface opposite to the top surface, and a tubular side surface located between the top surface and the bottom surface. The first resistive heater is disposed to face the bottom surface. The second resistive heater is provided to surround the side surface. The first support portion supports the crucible such that the bottom surface is separated from the first resistive heater, and the side surface is separated from the second resistive heater. The first support portion is in contact with at least one of the top surface and the side surface.

Stabilized, high-doped silicon carbide is described. A silicon carbide crystal is grown on a substrate using chemical vapor deposition so that the silicon carbide crystal includes a dopant and the strain compensating component. The strain compensating component can be an isoelectronic element and/or an element with the same majority carrier type as the dopant. The silicon carbide crystal can then be cut into silicon carbide wafers. In some embodiments, the dopant is n-type and the strain compensating component is selected from a group comprising germanium, tin, arsenic, phosphorus, and combinations thereof. In some embodiments, the strain compensating component comprises germanium and the dopant is nitrogen.

A method of forming an epitaxial layer on a substrate such as a sapphire wafer that does not readily absorb thermal radiation. The method includes coating a first side surface of the substrate with an energy-absorbing opaque material. The opaque material forms a thermally absorptive coating on the substrate. The coated substrate may be heated to remove contaminants from the thermally absorptive coating. The coated substrate is positioned in a vacuum deposition chamber and heated by directing radiative energy onto the thermally absorptive coating. An epitaxial layer such as GaN or SiGe is formed on a second side surface of the substrate opposite the thermally absorptive coating.