The present application provides a method for manufacturing a monocrystalline silicon sheet, including: cutting a monocrystalline silicon rod along a radial or an axial direction of the monocrystalline silicon rod to obtain a monocrystalline silicon substrate; etching a porous silicon structure on a top surface and a bottom surface of the monocrystalline silicon substrate by wet etching; depositing a monocrystalline silicon thin layer on the porous silicon structure by chemical vapor deposition, so that a thickness of the monocrystalline silicon thin layer reaches a predetermined value; and striping the monocrystalline silicon thin layer from the porous silicon structure to obtain the monocrystalline silicon sheet. In the present application, the production capacity of directly manufacturing a single crystal silicon wafer by a chemical vapor deposition method can be improved, and a process for manufacturing a silicon wafer is combined with the process of a diffusion emitter conventionally belonging to cell manufacturing, so that a manufacturing cost of a solar monocrystalline silicon cell is significantly reduced.

In a method for semiconductor processing, a semiconductor substrate is provided. The semiconductor substrate defines at least one first trench therein. The at least one first trench has a first depth (d.sub.1). A coating layer is deposited onto the semiconductor substrate using at least one precursor under a setting for a processing temperature (T). The coating layer defines at least one second trench having a second depth (d.sub.2) above the at least one first trench. A first depth parameter (t) of the second depth (d.sub.2) relative to the first depth (d.sub.1) is determined. The processing temperature (T) is then determined based on the first depth parameter (t).

A method includes flowing first precursors over a semiconductor substrate to form an epitaxial region, the epitaxial region includes a first element and a second element; converting a second precursor into first radicals and first ions; separating the first radicals from the first ions; and flowing the first radicals over the epitaxial region to remove at least some of the second element from the epitaxial region.

The present invention includes: transferring a C-plane sapphire thin film 1t having an off-angle of 0.5-5° onto a handle substrate composed of a ceramic material having a coefficient of thermal expansion at 800 K that is greater than that of silicon and less than that of C-plane sapphire; performing high-temperature nitriding treatment on the GaN epitaxial growth substrate 11 and covering the surface of the C-plane sapphire thin film 1t with a surface treatment layer 11a made of AlN; having GaN grow epitaxially on the surface treatment layer 11a; ion-implanting a GaN film 13; pasting and bonding together the GaN film-side surface of the ion-implanted GaN film carrier and a support substrate 12; performing peeling at an ion implantation region 13.sub.ion in the GaN film 13 and transferring a GaN thin film 13a onto the support substrate 12; and obtaining a GaN laminate substrate 10.

A method for manufacturing a monocrystalline piezoelectric material layer includes providing a donor substrate made of the piezoelectric material, providing a receiving substrate, transferring a so-called “seed layer” of the donor substrate onto the receiving substrate, and using epitaxy of the piezoelectric material on the seed layer until the desired thickness for the monocrystalline piezoelectric layer is obtained.

A nitride semiconductor laminate includes: a substrate comprising a group III nitride semiconductor and including a surface and a reverse surface, the surface being formed from a nitrogen-polar surface, the reverse surface being formed from a group III element-polar surface and being provided on the reverse side from the surface; a protective layer provided at least on the reverse surface side of the substrate and having higher heat resistance than the reverse surface of the substrate; and a semiconductor layer provided on the surface side of the substrate and comprising a group III nitride semiconductor. The concentration of O in the semiconductor layer is lower than 1×10.sup.17 at/cm.sup.3.

A method for growing polycrystalline diamond films having engineered grain growth and microstructure. Grain growth of a polycrystalline diamond film on a substrate is manipulated by growing the diamond on a nanopatterned substrate having features on the order of the initial grain size of the diamond film. By growing the diamond on such nanopatterned substrates, the crystal texture of a polycrystalline diamond film can be engineered to favor the preferred <110> orientation texture, which in turn enhances the thermal conductivity of the diamond film.

Provided are an epitaxial wafer growth furnace, an apparatus, an MOCVD method, and an epitaxial wafer. The growth furnace comprises: a growth furnace body for placing a substrate, an upper end face of the growth furnace body is a downward concave spherical surface, and the upper end face of the spherical shape has a preset mark position; when the substrate is placed on the preset mark position and the growth furnace body rotates, a difference value of the centrifugal force applied to each part of the substrate is within a preset range. The growth furnace body is a downward concave spherical surface, such that the substrate can be placed at the position where the centrifugal force applied to each part of the substrate is equal or similar, and thus each part on the substrate has same growth stress, the epitaxial wafer with a uniform thickness is obtained.

A free-standing substrate, for growing epitaxial crystal composed of a group 13 nitride crystal selected from gallium nitride, aluminum nitride, indium nitride or a mixed crystal thereof, includes a nitrogen polar surface and group 13 element polar surface. The nitrogen polar surface is warped in a convex shape, and a chamfer part is provided in an outer peripheral part of the nitrogen polar surface.

The substrate is doped with P, has a resistivity adjusted to 1.05 mΩ.Math.cm or less, and includes defects, formed in the crystal by the aggregation of P, which are Si—P crystal defects substantially. The method includes a step of forming a silicon oxide film on the backside of the substrate with a thickness of 300 nm or more and 700 nm or less, a step of mirror-polishing the substrate, and after the mirror-polishing step, a heat treatment step of the substrate mounted on a substrate holder made of Si or SiC, on the holder surface a silicon oxide film is formed with the thickness between 200 nm and 500 nm, wherein the thickness X of the silicon oxide film of the holder and the thickness Y of that on the backside of the substrate satisfy a relational expression Y=C−X, where C is a constant between 800 and 1000.